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path: root/llvm/test/CodeGen/X86/2012-01-12-extract-sv.ll
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* [x86] allow vector load narrowing with multi-use valuesSanjay Patel2018-11-101-2/+1
* [X86] Add initial SimplifyDemandedVectorEltsForTargetNode supportSimon Pilgrim2018-09-191-3/+2
* [X86][SSE] Combine (some) target shuffles with multiple usesSimon Pilgrim2018-08-091-4/+4
* [X86] Use 128-bit ops for 256-bit vzmovl patterns.Craig Topper2018-07-151-5/+7
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-1/+1
* [X86] Teach execution domain fixing to convert between VPERMILPS and VPSHUFD.Craig Topper2017-09-181-2/+2
* [X86] SET0 to use XMM registers where possible PR26018 PR32862Dinar Temirbulatov2017-07-271-1/+1
* [X86][SSE] Added support for combining target shuffles to (V)PSHUFD/VPERMILPD...Simon Pilgrim2016-06-281-1/+1
* [X86] No need to avoid selecting AVX_SET0 for 256-bit integer types when only...Craig Topper2016-05-081-2/+1
* [X86][AVX] Enable extraction of upper 128-bit subvectors for 'half undef' shu...Simon Pilgrim2016-01-161-1/+3
* [X86][AVX] Match broadcast loads through a bitcastSimon Pilgrim2016-01-091-3/+1
* Revert r257055, it caused PR26064.Nico Weber2016-01-071-1/+3
* [X86][AVX] Match broadcast loads through a bitcastSimon Pilgrim2016-01-071-3/+1
* [X86][AVX] Tests tidyupSimon Pilgrim2015-12-121-14/+14
* add checks; remove redundant testing parametersSanjay Patel2015-04-031-3/+16
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-1/+1
* Fix a bug in the AVX 256-bit shuffle code in cases where the splat element is...Nadav Rotem2012-01-121-0/+12
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