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* Reland "[WebAssembly] Expand setcc of v2i64"Thomas Lively2019-11-011-0/+150
| | | | | | | | This reverts commit e5cae5692b5899631b5bfe5c23234deb5efda10c, which reverted 11850a6305c5778b180243eb06aefe86762dd4ce. The original revert was done because of breakage that was actually in a separate commit, 2ab1b8c1ec452fb743f6cc5051e75a01039cabfe, which was also reverted and has since been fixed and relanded.
* Revert "[WebAssembly] Expand setcc of v2i64"Vlad Tsyrklevich2019-10-311-150/+0
| | | | | | This reverts commit 11850a6305c5778b180243eb06aefe86762dd4ce, it was causing build failures on numerous bots, including sanitizer-x86_64-linux-bootstrap-ubsan.
* [WebAssembly] Expand setcc of v2i64Thomas Lively2019-10-311-0/+150
| | | | | | | | | | | | | | | | | | | Summary: The SIMD spec does not include i64x2 comparisons, so they need to be expanded. Using setOperationAction to expand them also causes f64x2 comparisons to be expanded, so setCondCodeAction needs to be used instead. But since there are no legal condition codes, the legalizer does not know how to expand the comparisons. We therefore manually unroll the operation, taking care to fill each lane with -1 or 0 rather than 1 or 0 for consistency with the other vector comparisons. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69604
* [WebAssembly] Lower SIMD nnan setcc nodesThomas Lively2019-03-191-0/+632
| | | | | | | | | | | | | | | | | | Summary: Adds patterns to lower all the remaining setcc modes: lt, gt, le, and ge. Fixes PR40912. Reviewers: aheejin, sbc100, dschuff Reviewed By: dschuff Subscribers: jgravelle-google, hiraditya, sunfish, jdoerfert, llvm-commits, srj Tags: #llvm Differential Revision: https://reviews.llvm.org/D59519 llvm-svn: 356431
* [WebAssembly] Add unimplemented-simd128 subtarget featureThomas Lively2019-01-101-3/+3
| | | | | | | | | | | | | | Summary: This is a third attempt, but this time we have vetted it on Windows first. The previous errors were due to an uninitialized class member. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D56560 llvm-svn: 350901
* Revert "[WebAssembly] Add simd128-unimplemented subtarget feature"Thomas Lively2019-01-101-3/+3
| | | | | | This reverts rL350791. llvm-svn: 350795
* [WebAssembly] Add simd128-unimplemented subtarget featureThomas Lively2019-01-101-3/+3
| | | | | | | | | | This is a second attempt at r350778, which was reverted in r350789. The only change is that the unimplemented-simd128 feature has been renamed simd128-unimplemented, since naming it unimplemented-simd128 somehow made the simd128 feature flag enable the unimplemented-simd128 feature on Windows. llvm-svn: 350791
* Revert "[WebAssembly] Add unimplemented-simd128 subtarget feature"Thomas Lively2019-01-101-3/+3
| | | | | | This reverts L350778. llvm-svn: 350789
* [WebAssembly] Add unimplemented-simd128 subtarget featureThomas Lively2019-01-091-3/+3
| | | | | | | | | | | | | | | Summary: This replaces the old ad-hoc -wasm-enable-unimplemented-simd flag. Also makes the new unimplemented-simd128 feature imply the simd128 feature. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits, alexcrichton Differential Revision: https://reviews.llvm.org/D56501 llvm-svn: 350778
* [WebAssembly] Fix invalid machine instrs in -O0, verify in testsThomas Lively2018-12-211-3/+3
| | | | | | | | | | Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D55956 llvm-svn: 349889
* [WebAssembly] replaced .param/.result by .functypeWouter van Oortmerssen2018-11-191-232/+116
| | | | | | | | | | | | | | | | | | | | | Summary: This makes it easier/cleaner to generate a single signature from this directive. Also: - Adds the symbol name, such that we don't depend on the location of this directive anymore. - Actually constructs the signature in the assembler, and make the assembler own it. - Refactor the use of MVT vs ValType in the streamer and assembler to require less conversions overall. - Changed 700 or so tests to use it. Reviewers: sbc100, dschuff Subscribers: jgravelle-google, eraman, aheejin, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D54652 llvm-svn: 347228
* [WebAssembly] Implement vector sext_inreg and tests with comparisonsThomas Lively2018-10-201-20/+810
| | | | | | | | | | | | Summary: Depends on D53251. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D53252 llvm-svn: 344826
* [WebAssembly][NFC] Generalize operand numbers in SIMD testsThomas Lively2018-09-151-84/+84
| | | | | | | | | | Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52130 llvm-svn: 342303
* [WebAssembly][NFC] Move SIMD encoding tests to dedicated fileThomas Lively2018-09-141-219/+219
| | | | | | | | | | | | | | | | Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
* [WebAssembly] SIMD comparisonsThomas Lively2018-09-121-0/+644
Summary: Match the ordering semantics of non-vector comparisons. For floating point comparisons that do not correspond to instructions, the tests check that some vector comparison instruction was emitted but do not care about the full implementation. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51765 llvm-svn: 342064
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