| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [TargetLowering] Add ISD::AND handling to SimplifyDemandedVectorElts | Simon Pilgrim | 2018-12-12 | 1 | -13/+9 |
| * | [SystemZ] Reimplent SchedModel IssueWidth and WriteRes/ReadAdvance mappings. | Jonas Paulsson | 2018-07-20 | 1 | -1/+1 |
| * | [SystemZ] computeKnownBitsForTargetNode() / ComputeNumSignBitsForTargetNode() | Jonas Paulsson | 2018-03-17 | 1 | -2/+1 |
| * | [SystemZ] Update test case (NFC) | Jonas Paulsson | 2018-02-02 | 1 | -2/+2 |
| * | [SystemZ] set 'guessInstructionProperties = 0' and set flags as needed. | Jonas Paulsson | 2017-12-05 | 1 | -14/+11 |
| * | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih | 2017-12-04 | 1 | -2/+2 |
| * | [DAGTypeLegalizer] Handle widening truncate to vector of i1. | Jonas Paulsson | 2017-03-21 | 1 | -0/+37 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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