| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [RISCV] Split SP adjustment to reduce the offset of callee saved register ↵ | Shiva Chen | 2019-10-04 | 1 | -10/+6 |
| | | | | | | | | | | | | | | | | | | | | | spill and restore We would like to split the SP adjustment to reduce the instructions in prologue and epilogue as the following case. In this way, the offset of the callee saved register could fit in a single store. add sp,sp,-2032 sw ra,2028(sp) sw s0,2024(sp) sw s1,2020(sp) sw s3,2012(sp) sw s4,2008(sp) add sp,sp,-64 Differential Revision: https://reviews.llvm.org/D68011 llvm-svn: 373688 | ||||
| * | [RISCV] Support stack offset exceed 32-bit for RV64 | Shiva Chen | 2019-09-13 | 1 | -0/+38 |
| | | | | | | | Differential Revision: https://reviews.llvm.org/D61884 llvm-svn: 371810 | ||||
| * | Revert "[RISCV] Support stack offset exceed 32-bit for RV64" | Shiva Chen | 2019-09-13 | 1 | -38/+0 |
| | | | | | | | This reverts commit 1c340c62058d4115d21e5fa1ce3a0d094d28c792. llvm-svn: 371809 | ||||
| * | [RISCV] Support stack offset exceed 32-bit for RV64 | Shiva Chen | 2019-09-13 | 1 | -0/+38 |
| Differential Revision: https://reviews.llvm.org/D61884 llvm-svn: 371806 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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