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path: root/llvm/test/CodeGen/R600/imm.ll
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* R600 -> AMDGPU renameTom Stellard2015-06-131-617/+0
* R600: Re-enable sub-reg livenessTom Stellard2015-06-041-1/+1
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-2/+2
* R600/SI: Allow f64 inline immediates in i64 operandsMatt Arsenault2015-02-131-47/+162
* R600/SI: Enable a lot of existing tests for VI (squashed commits)Marek Olsak2015-02-111-18/+36
* R600/SI: Enable subreg liveness by defaultTom Stellard2015-02-041-30/+30
* R600/SI: Define a schedule model and enable the generic machine schedulerTom Stellard2015-01-291-17/+17
* R600/SI: Remove SIISelLowering::legalizeOperands()Tom Stellard2015-01-081-2/+2
* R600/SI: Add a V_MOV_B64 pseudo instructionTom Stellard2015-01-071-5/+2
* R600/SI: Add a stub GCNTargetMachineTom Stellard2015-01-061-1/+1
* R600/SI: Fix f64 inline immediatesMatt Arsenault2014-12-171-0/+272
* R600/SI: Change all instruction assembly names to lowercase.Tom Stellard2014-11-051-59/+59
* R600/SI: Allow comuting fp immediatesMatt Arsenault2014-10-171-9/+31
* R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol ...Tom Stellard2014-10-011-21/+21
* R600/SI: Fix printing of clamp and omodMatt Arsenault2014-09-301-9/+9
* R600/SI: Change formatting of printed FP immediatesMatt Arsenault2014-09-171-3/+173
* R600/SI: Change formatting of printed registers.Matt Arsenault2013-11-121-6/+6
* R600/SI: Use -verify-machineinstrs for most testsTom Stellard2013-10-101-1/+1
* R600/SI: Add support for buffer stores v2Tom Stellard2013-04-051-3/+0
* R600/SI: Add processor types for each SI variantTom Stellard2013-04-051-1/+1
* R600/SI: Avoid generating S_MOVs with 64-bit immediates v2Tom Stellard2013-04-051-0/+26
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