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path: root/llvm/test/CodeGen/R600/fp_to_uint.ll
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* R600 -> AMDGPU renameTom Stellard2015-06-131-217/+0
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-1/+1
* R600/SI: Enable all tests that pass on VI without changesMarek Olsak2015-01-271-0/+1
* R600/SI: Add a stub GCNTargetMachineTom Stellard2015-01-061-1/+1
* R600: Cleanup some tests and add missing testcasesMatt Arsenault2014-12-021-15/+16
* R600/SI: Change all instruction assembly names to lowercase.Tom Stellard2014-11-051-11/+11
* R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol ...Tom Stellard2014-10-011-6/+6
* R600: Fix some missing conversion testcasesMatt Arsenault2014-09-251-0/+10
* Remove duplicated RUN lines in middle of testMatt Arsenault2014-09-251-2/+0
* [SDAG] When performing post-legalize DAG combining, run the legalizerChandler Carruth2014-07-261-14/+14
* R600: Implement float to long/ulongJan Vesely2014-07-101-18/+192
* R600/SI: Use -verify-machineinstrs for most testsTom Stellard2013-10-101-1/+1
* R600: Non vector only instruction can be scheduled on trans unitVincent Lejeune2013-09-041-6/+6
* R600/SI: Add pattern for fp_to_uintTom Stellard2013-08-141-9/+18
* R600: Add 64-bit float load/store supportTom Stellard2013-08-011-0/+10
* Revert "R600: Non vector only instruction can be scheduled on trans unit"Tom Stellard2013-07-311-1/+1
* R600: Non vector only instruction can be scheduled on trans unitVincent Lejeune2013-07-311-1/+1
* R600: Support schedule and packetization of trans-only instVincent Lejeune2013-06-291-4/+4
* R600: Prettier asmPrint of AluVincent Lejeune2013-05-021-4/+4
* R600: Reorganize lit tests and document how they should be organizedTom Stellard2013-04-191-0/+14
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