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path: root/llvm/test/CodeGen/R600/ds_read2st64.ll
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* R600 -> AMDGPU renameTom Stellard2015-06-131-272/+0
* R600/SI: Remove M0Reg register classTom Stellard2015-05-121-1/+1
* R600/SI: Remove explicit m0 operand from DS instructionsTom Stellard2015-05-121-1/+1
* R600/SI: Don't print offset0/offset1 DS operands when they are 0Tom Stellard2015-04-081-4/+4
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-26/+26
* [opaque pointer type] Add textual IR support for explicit type parameter to g...David Blaikie2015-02-271-39/+39
* R600/SI: Define a schedule model and enable the generic machine schedulerTom Stellard2015-01-291-2/+2
* R600/SI: Add a stub GCNTargetMachineTom Stellard2015-01-061-1/+1
* R600: Error on initializer for LDS.Matt Arsenault2014-11-131-2/+2
* R600/SI: Change all instruction assembly names to lowercase.Tom Stellard2014-11-051-52/+52
* R600/SI: Change how DS offsets are printedMatt Arsenault2014-10-101-13/+13
* R600/SI: Match read2/write2 stride 64 versionsMatt Arsenault2014-10-101-0/+272
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