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* Fix up -fstack-protector on linux to use the segmentEric Christopher2010-07-061-0/+25
| | | | | | | | | registers. Split out testcases per architecture and os now. Patch from Nelson Elhage. llvm-svn: 107640
* Implement the "linker_private_weak" linkage type. This will be used forBill Wendling2010-07-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Objective-C metadata types which should be marked as "weak", but which the linker will remove upon final linkage. However, this linkage isn't specific to Objective-C. For example, the "objc_msgSend_fixup_alloc" symbol is defined like this: .globl l_objc_msgSend_fixup_alloc .weak_definition l_objc_msgSend_fixup_alloc .section __DATA, __objc_msgrefs, coalesced .align 3 l_objc_msgSend_fixup_alloc: .quad _objc_msgSend_fixup .quad L_OBJC_METH_VAR_NAME_1 This is different from the "linker_private" linkage type, because it can't have the metadata defined with ".weak_definition". Currently only supported on Darwin platforms. llvm-svn: 107433
* Eliminate the other half of the BRCOND optimization, and updateDan Gohman2010-06-241-433/+0
| | | | | | as many tests as possible. llvm-svn: 106749
* Eliminate the first have of the optimization which eliminates BRCONDDan Gohman2010-06-241-21/+0
| | | | | | | | | | | | | when the condition is constant. This optimization shouldn't be necessary, because codegen shouldn't be able to find dead control paths that the IR-level optimizer can't find. And it's undesirable, because it encourages bugpoint to leave "br i1 false" branches in its output. And it wasn't updating the CFG. I updated all the tests I could, but some tests are too reduced and I wasn't able to meaningfully preserve them. llvm-svn: 106748
* Remove the local register allocator.Jakob Stoklund Olesen2010-06-155-5/+0
| | | | | | Please use the fast allocator instead. llvm-svn: 106051
* Fix some latency computation bugs: if the use is not a machine opcode do not ↵Evan Cheng2010-05-281-2/+2
| | | | | | just return zero. llvm-svn: 105061
* Only use clairvoyance when defining a register, and then only if it has one use.Jakob Stoklund Olesen2010-05-171-9/+5
| | | | | | This makes allocation independent on the ordering of use-def chains. llvm-svn: 103935
* Take allocation hints from copy instructions to/from physregs.Jakob Stoklund Olesen2010-05-131-2/+2
| | | | | | This causes way more identity copies to be generated, ripe for coalescing. llvm-svn: 103686
* Enable a bunch more -regalloc=fast testsJakob Stoklund Olesen2010-05-125-4/+14
| | | | llvm-svn: 103531
* Implement builtin_return_address(x) and builtin_frame_address(x) Dale Johannesen2010-05-031-0/+24
| | | | | | on PPC for x!=0. 7624113. llvm-svn: 102972
* Remove the -enable-sjlj-eh option, which doesn't do anything.Duncan Sands2010-05-021-1/+1
| | | | | | | Remove the -enable-eh option which is only used by the JIT, and replace it with -jit-enable-eh. llvm-svn: 102865
* on darwin empty functions need to codegen into something of non-zero length,Chris Lattner2010-04-261-1/+1
| | | | | | | | | | | otherwise labels get incorrectly merged. We handled this by emitting a ".byte 0", but this isn't correct on thumb/arm targets where the text segment needs to be a multiple of 2/4 bytes. Handle this by emitting a noop. This is more gross than it should be because arm/ppc are not fully mc'ized yet. This fixes rdar://7908505 llvm-svn: 102400
* Bill's change in r95336 broke empty aggregates embeddedChris Lattner2010-04-201-1/+10
| | | | | | | | | | | | in other types. fix this by only bumping zero-byte globals up to a single byte if the *entire global* is zero size, fixing PR6340. This also fixes empty arrays etc to be handled correctly, and only does this on subsection-via-symbols targets (aka darwin) which is the only place where this matters. llvm-svn: 101879
* Start function numbering at 0.Dan Gohman2010-04-171-2/+2
| | | | llvm-svn: 101638
* add newlines at the end of files.Chris Lattner2010-04-071-1/+1
| | | | llvm-svn: 100705
* Split big test into multiple directories to cater toDale Johannesen2010-04-071-0/+33
| | | | | | those who don't build all targets. llvm-svn: 100688
* After trivial coalescing, the MI being visited may have become a copy. Avoid ↵Evan Cheng2010-04-021-0/+70
| | | | | | | | adding it to CSE hash table since copies aren't being considered for CSE and they may be deleted. rdar://7819990 llvm-svn: 100170
* add some nounwindsChris Lattner2010-03-281-12/+12
| | | | llvm-svn: 99752
* this takes an insane amount of time to run, disable it for now (PR6727)Chris Lattner2010-03-281-1/+3
| | | | llvm-svn: 99751
* Turn calls to copysignl into an FCOPYSIGN node. Handle FCOPYSIGN nodesDuncan Sands2010-03-141-0/+7
| | | | | | | with ppc_f128 type by having the type legalizer turn these back into a call to copysignl. llvm-svn: 98514
* fix AsmPrinter::GetBlockAddressSymbol to always return a uniqueChris Lattner2010-03-141-4/+4
| | | | | | | label instead of trying to form one based on the BB name (which causes collisions if the name is empty). This fixes PR6608 llvm-svn: 98495
* get MMI out of the label uniquing business, just go to MCContextChris Lattner2010-03-141-2/+2
| | | | | | to get unique assembler temporary labels. llvm-svn: 98489
* Enable machine cse pass.Evan Cheng2010-03-101-6/+6
| | | | llvm-svn: 98132
* The address of an indirect call must be in R12 on Darwin.Dale Johannesen2010-03-091-0/+19
| | | | | | | | Make it so. (This patch is in LowerCall_Darwin, which seems to be used by SVR4 code as well; since that doesn't belong here, I haven't worried about this case.) llvm-svn: 98077
* add some random nounwinds.Chris Lattner2010-02-281-1/+1
| | | | llvm-svn: 97411
* Use the right floating point load/store instructions in ↵Jakob Stoklund Olesen2010-02-261-0/+433
| | | | | | | | | | | | | | | | | | PPCInstrInfo::foldMemoryOperandImpl(). The PowerPC floating point registers can represent both f32 and f64 via the two register classes F4RC and F8RC. F8RC is considered a subclass of F4RC to allow cross-class coalescing. This coalescing only affects whether registers are spilled as f32 or f64. Spill slots must be accessed with load/store instructions corresponding to the class of the spilled register. PPCInstrInfo::foldMemoryOperandImpl was looking at the instruction opcode which is wrong. X86 has similar floating point register classes, but doesn't try to fold memory operands, so there is no problem there. llvm-svn: 97262
* Change the scheduler from adding nodes in allnodes orderChris Lattner2010-02-241-2/+2
| | | | | | | | | | | | | | | | | | to adding them in a determinstic order (bottom up from the root) based on the structure of the graph itself. This updates tests for some random changes, interesting bits: CodeGen/Blackfin/promote-logic.ll no longer crashes. I have no idea why, but that's good right? CodeGen/X86/2009-07-16-LoadFoldingBug.ll also fails, but now compiles to have one fewer constant pool entry, making the expected load that was being folded disappear. Since it is an unreduced mass of gnast, I just removed it. This fixes PR6370 llvm-svn: 97023
* When emitting an instruction which depends on both a post-incrementedDan Gohman2010-02-221-0/+32
| | | | | | | | | induction variable value and a loop-variant value, don't force the insert position to be at the post-increment position, because it may not be dominated by the loop-variant value. This fixes a use-before-def problem noticed on PPC. llvm-svn: 96774
* add some no-unwinds, other minor cleanups.Chris Lattner2010-02-213-30/+30
| | | | llvm-svn: 96756
* add a triple so that this doesn't fail due to linux/ppc register printing Chris Lattner2010-02-211-1/+1
| | | | | | syntax. llvm-svn: 96748
* filecheckize and add nouwinds.Chris Lattner2010-02-211-9/+16
| | | | llvm-svn: 96745
* Make g5 target explicit; scheduling affects register choice.Dale Johannesen2010-02-161-1/+1
| | | | llvm-svn: 96413
* Adjust register numbers in tests to compensate for theDale Johannesen2010-02-164-14/+14
| | | | | | new lack of R2. llvm-svn: 96407
* When save/restoring CR at prolog/epilog, in a largeDale Johannesen2010-02-121-0/+30
| | | | | | | | | | | | | | | | | stack frame, the prolog/epilog code was using the same register for the copy of CR and the address of the save slot. Oops. This is fixed here for Darwin, sort of, by reserving R2 for this case. A better way would be to do the store before the decrement of SP, which is safe on Darwin due to the red zone. SVR4 probably has the same problem, but I don't know how to fix it; there is no red zone and R2 is already used for something else. I'm going to leave it to someone interested in that target. Better still would be to rewrite the CR-saving code completely; spilling each CR subregister individually is horrible code. llvm-svn: 96015
* Fix alignment on ppc linux. This fixes the build of crtend.oRafael Espindola2010-02-061-9/+40
| | | | llvm-svn: 95477
* Make test more fucused eliminating extraneous bits.Bill Wendling2010-02-051-44/+5
| | | | llvm-svn: 95384
* An empty global constant (one of size 0) may have a section immediatelyBill Wendling2010-02-051-0/+50
| | | | | | | | | | | following it. However, the EmitGlobalConstant method wasn't emitting a body for the constant. The assembler doesn't like that. Before, we were generating this: .zerofill __DATA, __common, __cmd, 1, 3 This fix puts us back to that semantic. llvm-svn: 95336
* Reapply 95050 with a tweak to check the register class.Dale Johannesen2010-02-031-2/+2
| | | | llvm-svn: 95183
* Test revert 95050; there's a good chance it's causingDale Johannesen2010-02-021-2/+2
| | | | | | buildbot failure. llvm-svn: 95103
* Make local RA smarter about reusing input register of a copyDale Johannesen2010-02-021-2/+2
| | | | | | | as output. Needed for (functional) correctness in inline asm, and should be generally beneficial. 7361612. llvm-svn: 95050
* Give AsmPrinter the most common expected implementation of Chris Lattner2010-01-281-1/+1
| | | | | | | | runOnMachineFunction, and switch PPC to use EmitFunctionBody. The two ppc asmprinters now don't heave to define runOnMachineFunction. llvm-svn: 94722
* Attempt to unbreak test on Linux. Chris, please check.Daniel Dunbar2010-01-251-3/+3
| | | | llvm-svn: 94399
* stop testing for invalid output.Chris Lattner2010-01-231-1/+0
| | | | llvm-svn: 94288
* testcase for r94095Chris Lattner2010-01-211-0/+22
| | | | llvm-svn: 94096
* Now that we have everything nicely factored (e.g. asmprinter is notChris Lattner2010-01-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | doing global variable classification anymore) and hookized, sink almost all target targets global variable emission code into AsmPrinter and out of each target. Some notes: 1. PIC16 does completely custom and crazy stuff, so it is not changed. 2. XCore has some custom handling for extra directives. I'll look at it next. 3. This switches linux/ppc to use .globl instead of .global. If .globl is actually wrong, let me know and I'll fix it. 4. This makes linux/ppc get a lot of random cases right which were obviously wrong before, it is probably now a bit healthier. 5. Blackfin will probably start getting .comm and other things that it didn't before. If this is undesirable, it should explicitly opt out of these things by clearing the relevant fields of MCAsmInfo. This leads to a nice diffstat: 14 files changed, 127 insertions(+), 830 deletions(-) llvm-svn: 93858
* remove uses of deprecated functions, this generates slightlyChris Lattner2010-01-131-4/+4
| | | | | | | | | different BlockAddress labels, but nothing semantically important. Add a FIXME that BlockAddress codegen is broken if the LLVM BB has an empty name (e.g. strip was run). llvm-svn: 93303
* Delete useless trailing semicolons.Dan Gohman2010-01-051-1/+1
| | | | llvm-svn: 92740
* Do better with physical reg operands (typically, from inline asm)Dale Johannesen2009-12-161-2/+2
| | | | | | | | | | | | | | | | | | in local register allocator. If a reg-reg copy has a phys reg input and a virt reg output, and this is the last use of the phys reg, assign the phys reg to the virt reg. If a reg-reg copy has a phys reg output and we need to reload its spilled input, reload it directly into the phys reg than passing it through another reg. Following 76208, there is sometimes no dependency between the def of a phys reg and its use; this creates a window where that phys reg can be used for spilling (this is true in linear scan also). This is bad and needs to be fixed a better way, although 76208 works too well in practice to be reverted. However, there should normally be no spilling within inline asm blocks. The patch here goes a long way towards making this actually be true. llvm-svn: 91485
* ProcessImplicitDefs should watch out for invalidated iterator and extra ↵Evan Cheng2009-11-251-0/+56
| | | | | | implicit operands on copies. llvm-svn: 89880
* Do not store R31 into the caller's link area on PPC.Dale Johannesen2009-11-244-26/+26
| | | | | | | | | | | | This violates the ABI (that area is "reserved"), and while it is safe if all code is generated with current compilers, there is some very old code around that uses that slot for something else, and breaks if it is stored into. Adjust testcases looking for current behavior. I've verified that the stack frame size is right in all testcases, whether it changed or not. 7311323. llvm-svn: 89811
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