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bcm5719-llvm
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meklort-10.0.1
ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
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llvm
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test
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CodeGen
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PowerPC
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vsx-p9.ll
Commit message (
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Author
Age
Files
Lines
*
[PowerPC] Ensure displacements for DQ-Form instructions are multiples of 16
Nemanja Ivanovic
2017-07-13
1
-24
/
+24
*
P9: D-form vector load/store. Differential Revision: https://reviews.llvm.org...
Zaara Syeda
2017-05-24
1
-36
/
+36
*
Fix some broken CHECK lines.
Benjamin Kramer
2017-01-22
1
-6
/
+6
*
[Power9] Add patterns for vnegd, vnegw
Ehsan Amiri
2016-11-18
1
-0
/
+22
*
vector load store with length (left justified) llvm portion
Zaara Syeda
2016-11-15
1
-0
/
+46
*
[PPC] Add intrinsic mapping to the xscvhpsp instruction
Sean Fertile
2016-11-14
1
-0
/
+11
*
[PPC] add intrinsics for vec extract exp/significand and vec test data class.
Sean Fertile
2016-11-14
1
-0
/
+71
*
[PowerPC] Add remaining vector permute builtins in altivec.h - LLVM portion
Nemanja Ivanovic
2016-11-11
1
-0
/
+70
*
[PowerPC] Implement vector shift builtins - llvm portion
Nemanja Ivanovic
2016-11-01
1
-0
/
+23
*
[PowerPC] Implement vec_insert_exp builtins - llvm portion
Nemanja Ivanovic
2016-10-26
1
-0
/
+24
*
[Power9] Add exploitation of non-permuting memory ops
Nemanja Ivanovic
2016-09-22
1
-0
/
+146