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path: root/llvm/test/CodeGen/PowerPC/swaps-le-6.ll
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* [Power9] Enable the Out-of-Order scheduling model for P9 hwQingShan Zhang2019-01-031-13/+35
* [PowerPC] Make no-PIC default to match GCC - LLVMStefan Pintilie2018-12-041-3/+3
* Revert "[PowerPC] Make no-PIC default to match GCC - LLVM"Stefan Pintilie2018-11-161-3/+3
* [PowerPC] Make no-PIC default to match GCC - LLVMStefan Pintilie2018-11-161-3/+3
* [PowerPC] Improve codegen for vector loads using scalar_to_vectorZaara Syeda2018-08-081-32/+57
* [PowerPC] Remove the match pattern in the definition of LXSDX/STXSDXLei Huang2018-05-241-2/+2
* [PowerPC] Ensure displacements for DQ-Form instructions are multiples of 16Nemanja Ivanovic2017-07-131-4/+4
* P9: D-form vector load/store. Differential Revision: https://reviews.llvm.org...Zaara Syeda2017-05-241-4/+4
* [Power9] Exploit D-Form VSX Scalar memory ops that target full VSX register setNemanja Ivanovic2016-10-041-4/+4
* [Power9] Add exploitation of non-permuting memory opsNemanja Ivanovic2016-09-221-1/+23
* Adding -verify-machineinstrs option to PowerPC testsEhsan Amiri2016-08-031-1/+1
* [PowerPC] Add an MI SSA peephole pass.Bill Schmidt2015-11-101-4/+2
* [PPC64LE] More vector swap optimization TLCBill Schmidt2015-07-211-0/+44
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