Commit message (Collapse) | Author | Age | Files | Lines | |
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* | [NVPTX] Rename registers %fl -> %fd and %rl -> %rd | Justin Holewinski | 2014-07-16 | 1 | -8/+8 |
| | | | | | | This matches the internal behavior of NVIDIA tools like libnvvm. llvm-svn: 213168 | ||||
* | [NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is ↵ | Justin Holewinski | 2013-06-28 | 1 | -2/+2 |
| | | | | | | rather poor and we're better off just ignoring it and letting LLVM expand all i8 ops out to i16. llvm-svn: 185174 | ||||
* | This patch adds a new NVPTX back-end to LLVM which supports code generation ↵ | Justin Holewinski | 2012-05-04 | 1 | -0/+69 |
for NVIDIA PTX 3.0. This back-end will (eventually) replace the current PTX back-end, while maintaining compatibility with it. The new target machines are: nvptx (old ptx32) => 32-bit PTX nvptx64 (old ptx64) => 64-bit PTX The sources are based on the internal NVIDIA NVPTX back-end, and contain more functionality than the current PTX back-end currently provides. NV_CONTRIB llvm-svn: 156196 |