| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE. | Daniel Sanders | 2015-10-15 | 1 | -1/+1 |
| * | [opaque pointer type] Add textual IR support for explicit type parameter to t... | David Blaikie | 2015-04-16 | 1 | -2/+2 |
| * | [opaque pointer type] Add textual IR support for explicit type parameter to l... | David Blaikie | 2015-02-27 | 1 | -10/+10 |
| * | [mips] Make sure there is a chain edge dependency between loads that read | Akira Hatanaka | 2013-11-09 | 1 | -0/+13 |
| * | Test case for r167039. Check that tail-call optimization is disabled for | Akira Hatanaka | 2012-10-31 | 1 | -0/+23 |
| * | [mips] Allow tail-call optimization for vararg functions and functions which | Akira Hatanaka | 2012-10-30 | 1 | -1/+65 |
| * | [mips] Do not tail-call optimize vararg functions or functions with byval | Akira Hatanaka | 2012-10-27 | 1 | -0/+58 |
| * | [mips] Add code to do tail call optimization. | Akira Hatanaka | 2012-10-19 | 1 | -0/+100 |

