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* [mips][msa] Added support for matching max, maxi, min, mini from normal IR ↵Daniel Sanders2013-09-243-4/+1096
| | | | | | (i.e. not intrinsics) llvm-svn: 191291
* [mips][msa] Added support for matching bsel and bseli from normal IR (i.e. ↵Daniel Sanders2013-09-244-7/+413
| | | | | | | | not intrinsics) This required correcting the definition of the bsel and bseli intrinsics. llvm-svn: 191290
* [mips][msa] Added support for matching comparisons from normal IR (i.e. not ↵Daniel Sanders2013-09-242-0/+1159
| | | | | | | | | intrinsics) MIPS SelectionDAG changes: * Added VCEQ, VCL[ET]_[SU] nodes to represent vector comparisons that produce a bitmask. llvm-svn: 191286
* [mips][msa] Added support for matching slli, srai, and srli from normal IR ↵Daniel Sanders2013-09-241-0/+168
| | | | | | (i.e. not intrinsics) llvm-svn: 191285
* [mips][msa] Added support for matching addvi, and subvi from normal IR (i.e. ↵Daniel Sanders2013-09-231-0/+113
| | | | | | not intrinsics) llvm-svn: 191203
* [mips][msa] Added support for matching insert and copy from normal IR (i.e. ↵Daniel Sanders2013-09-231-0/+226
| | | | | | | | | | | not intrinsics) Changes to MIPS SelectionDAG: * Added nodes VEXTRACT_[SZ]EXT_ELT to represent extract and extend in a single operation and implemented the DAG combines necessary to fold sign/zero extends into the extract. llvm-svn: 191199
* [mips][msa] Added support for matching pcnt from normal IR (i.e. not intrinsics)Daniel Sanders2013-09-231-0/+60
| | | | llvm-svn: 191198
* [mips][msa] Added support for matching nor from normal IR (i.e. not intrinsics)Daniel Sanders2013-09-231-0/+68
| | | | llvm-svn: 191195
* [mips][msa] Added support for matching and, or, and xor from normal IR (i.e. ↵Daniel Sanders2013-09-232-0/+390
| | | | | | not intrinsics) llvm-svn: 191194
* [mips][msa] Implemented build_vector using ldi, fill, and custom ↵Daniel Sanders2013-09-232-0/+177
| | | | | | | | | | | | | | | | | | SelectionDAG nodes (VSPLAT and VSPLATD) Note: There's a later patch on my branch that re-implements this to select build_vector without the custom SelectionDAG nodes. The future patch avoids the constant-folding problems stemming from the custom node (i.e. it doesn't need to re-implement all the DAG combines related to BUILD_VECTOR). Changes to MIPS specific SelectionDAG nodes: * Added VSPLAT This is a special case of BUILD_VECTOR that covers the case the BUILD_VECTOR is a splat operation. * Added VSPLATD This is a special case of VSPLAT that handles the cases when v2i64 is legal llvm-svn: 191191
* [mips][msa] Added test cases that were supposed to be part of r190507, ↵Daniel Sanders2013-09-113-0/+734
| | | | | | r190509, r190512, and r190518. llvm-svn: 190522
* [mips][msa] Added support for matching mulv, nlzc, sll, sra, srl, and subv ↵Daniel Sanders2013-09-112-0/+323
| | | | | | from normal IR (i.e. not intrinsics) llvm-svn: 190518
* [mips][msa] Added support for matching fadd, fdiv, flog2, fmul, frint, ↵Daniel Sanders2013-09-112-0/+224
| | | | | | fsqrt, and fsub from normal IR (i.e. not intrinsics) llvm-svn: 190512
* [mips][msa] Added support for matching div_[su] from normal IR (i.e. not ↵Daniel Sanders2013-09-111-0/+130
| | | | | | intrinsics) llvm-svn: 190509
* [mips][msa] Added support for matching addv from normal IR (i.e. not intrinsics)Daniel Sanders2013-09-111-0/+68
| | | | | | The corresponding intrinsic is now lowered into equivalent IR (ISD::ADD) before instruction selection. llvm-svn: 190507
* [mips][msa] Corrected the definition of the dotp_[su].[hwd] intrinsicsDaniel Sanders2013-09-111-52/+86
| | | | | | | The elements of the operands should be half the width of the elements of the result. llvm-svn: 190505
* [mips][msa] Removed unsupported dot product instructions (dotp_[su].b)Daniel Sanders2013-09-101-44/+0
| | | | | | The dotp_[su].b instructions never existed in any revision of the MSA spec. llvm-svn: 190398
* [mips][msa] Added bnz.df, bnz.v, bz.df, and bz.vDaniel Sanders2013-08-282-0/+134
| | | | | | | | | | | | | These intrinsics are legalized to V(ALL|ANY)_(NON)?ZERO nodes, are matched as SN?Z_[BHWDV]_PSEUDO pseudo's, and emitted as a branch/mov sequence to evaluate to 0 or 1. Note: The resulting code is sub-optimal since it doesnt seem to be possible to feed the result of an intrinsic directly into a brcond. At the moment it uses (SETCC (VALL_ZERO $ws), 0, SETEQ) and similar which unnecessarily evaluates the boolean twice. llvm-svn: 189478
* [mips][msa] Added load/store intrinsics.Daniel Sanders2013-08-282-0/+298
| | | | llvm-svn: 189476
* [mips][msa] Added move.vDaniel Sanders2013-08-281-0/+24
| | | | llvm-svn: 189471
* [mips][msa] Added cfcmsa, and ctcmsaDaniel Sanders2013-08-281-0/+167
| | | | | | | | The MSA control registers have been added as reserved registers, and are only used via ISD::Copy(To|From)Reg. The intrinsics are lowered into these nodes. llvm-svn: 189468
* [mips][msa] Added f[cs]af, f[cs]or, f[cs]ueq, f[cs]ul[et], f[cs]une, fsun, ↵Daniel Sanders2013-08-284-0/+976
| | | | | | ftrunc_[su], hadd_[su], hsub_[su], sr[al]r, sr[al]ri llvm-svn: 189467
* [mips][msa] Summarize testsDaniel Sanders2013-08-2840-4/+114
| | | | | | Adds a comment to the start of each test summarizing the area the test covers. llvm-svn: 189465
* [mips][msa] Added tests for and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v ↵Daniel Sanders2013-08-271-43/+523
| | | | | | | | | | | | when non-byte vectors are used. Note that all of these tests use ld.b and st.b for the loads and stores regardless of the data size. This is because the definition of bitcast is equivalent to a store/load sequence and DAG combiner accordingly folds bitcasts to/from v16i8 into the load/store nodes to product load/store nodes with type v16i8. llvm-svn: 189333
* [mips][msa] Added spill/reload supportDaniel Sanders2013-08-271-0/+597
| | | | llvm-svn: 189332
* [mips][msa] Added bitconverts for vector types for big and little-endianDaniel Sanders2013-08-271-0/+1208
| | | | llvm-svn: 189330
* [mips][msa] Removed fcge, fcgt, fsge, fsgtDaniel Sanders2013-08-201-176/+0
| | | | | | | These instructions were present in a draft spec but were removed before publication. llvm-svn: 188782
* [mips][msa] Added insveDaniel Sanders2013-08-201-0/+91
| | | | llvm-svn: 188777
* [mips][msa] Added and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.vDaniel Sanders2013-08-201-0/+176
| | | | llvm-svn: 188767
* [Mips][msa] Added the simple builtins (madd_q to xori)Jack Carter2013-08-1514-0/+3692
| | | | | | | | | | | | Includes: madd_q, maddr_q, maddv, max_[asu], maxi_[su], min_[asu], mini_[su], mod_[su], msub_q, msubr_q, msubv, mul_q, mulr_q, mulv, nloc, nlzc, nori, ori, pckev, pckod, pcnt, sat_[su], shf, sld, sldi, sll, slli, splat, splati, sr[al], sr[al]i, subs_[su], subss_u, subus_s, subv, subvi, vshf, xori Patch by Daniel Sanders llvm-svn: 188460
* [Mips][msa] Added the simple builtins (fadd to ftq)Jack Carter2013-08-1511-0/+1710
| | | | | | | | | | | | Includes: fadd, fceq, fcg[et], fclass, fcl[et], fcne, fcun, fdiv, fexdo, fexp2, fexup[lr], ffint_[su], ffql, ffqr, fill, flog2, fmadd, fmax, fmax_a, fmin, fmin_a, fmsub, fmul, frint, frcp, frsqrt, fseq, fsge, fsgt, fsle, fslt, fsne, fsqr, fsub, ftint_s, ftq Patch by Daniel Sanders llvm-svn: 188458
* [Mips][msa] Added the simple builtins (add_a to dpsub[su], ilvev to ldi)Jack Carter2013-08-1513-0/+4027
Includes: add_a, adds_[asu], addv, addvi, andi.b, asub_[su].[bhwd], aver?_[su]_[bhwd], bclr, bclri, bins[lr], bins[lr]i, bmnzi, bmzi, bneg, bnegi, bseli, bset, bseti, c(eq|ne), c(eq|ne)i, cl[et]_[su], cl[et]i_[su], copy_[su].[bhw], div_[su], dotp_[su], dpadd_[su], dpsub_[su], ilvev, ilvl, ilvod, ilvr, insv, insve, ldi Patch by Daniel Sanders llvm-svn: 188457
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