Commit message (Expand) | Author | Age | Files | Lines | |
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* | [mips] Explicitly select `mips32r2` CPU for test cases require 64-bit FPU. NFC | Simon Atanasyan | 2019-07-09 | 1 | -2/+2 |
* | [DAGCombiner][AMDGPU][Mips] Fold bitcast with volatile loads if the resulting... | Craig Topper | 2018-08-28 | 1 | -15/+10 |
* | [opaque pointer type] Add textual IR support for explicit type parameter to l... | David Blaikie | 2015-02-27 | 1 | -49/+49 |
* | [mips][msa] Build all the tests in little and big endian modes and correct an... | Daniel Sanders | 2013-11-15 | 1 | -1/+1 |
* | [mips][msa] MSA requires FR=1 mode (64-bit FPU register file). Report fatal e... | Daniel Sanders | 2013-09-27 | 1 | -2/+2 |
* | [mips][msa] Summarize tests | Daniel Sanders | 2013-08-28 | 1 | -0/+2 |
* | [mips][msa] Added bitconverts for vector types for big and little-endian | Daniel Sanders | 2013-08-27 | 1 | -0/+1208 |