| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [mips] Split the DSP control register and define one register for each field of | Akira Hatanaka | 2013-05-03 | 1 | -8/+3 |
| * | MIPS DSP: add operands to make sure instruction strings are being matched. | Akira Hatanaka | 2012-09-28 | 1 | -20/+20 |
| * | MIPS DSP: other miscellaneous instructions. | Akira Hatanaka | 2012-09-28 | 1 | -0/+41 |
| * | MIPS DSP: ABSQ_S.PH instruction sub-class. | Akira Hatanaka | 2012-09-27 | 1 | -0/+202 |
| * | MIPS DSP: SHLL.QB instruction sub-class. | Akira Hatanaka | 2012-09-27 | 1 | -0/+180 |
| * | Test case for r164755 and 164756. | Akira Hatanaka | 2012-09-27 | 1 | -0/+220 |
| * | MIPS DSP: ADDU.QB instruction sub-class. | Akira Hatanaka | 2012-09-27 | 1 | -0/+239 |
| * | MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos Field... | Akira Hatanaka | 2012-09-27 | 1 | -0/+10 |
| * | MIPS DSP: all the remaining instructions which read or write accumulators. | Akira Hatanaka | 2012-09-27 | 1 | -0/+239 |
| * | MIPS DSP: add support for extract-word instructions. | Akira Hatanaka | 2012-09-27 | 1 | -0/+110 |

