summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/Mips/GlobalISel
Commit message (Expand)AuthorAgeFilesLines
* GlobalISel: Correct result type for G_FCMP in lowerFPTOUIMatt Arsenault2020-01-062-36/+81
* [MIPS GlobalISel] Select bitreverse. RecommitPetar Avramovic2019-12-302-0/+399
* Revert "[MIPS GlobalISel] Select bitreverse"Dmitri Gribenko2019-12-302-399/+0
* [MIPS GlobalISel] Select bitreversePetar Avramovic2019-12-302-0/+399
* [MIPS GlobalISel] Select bswapPetar Avramovic2019-12-304-0/+227
* [GlobalISel]: Allow targets to override how to widen constants during legaliz...Aditya Nandakumar2019-12-035-11/+10
* [MIPS GlobalISel] Select andi, ori and xoriPetar Avramovic2019-11-1523-517/+579
* [MIPS GlobalISel] Select addiuPetar Avramovic2019-11-153-4/+110
* [globalisel] Rename G_GEP to G_PTR_ADDDaniel Sanders2019-11-0517-55/+55
* [MIPS GlobalISel] Select MSA vector generic and builtin fsqrtPetar Avramovic2019-10-256-0/+303
* [MIPS GlobalISel] Select MSA vector generic and builtin fabsPetar Avramovic2019-10-246-0/+302
* [MIPS GlobalISel] MSA vector generic and builtin fadd, fsub, fmul, fdivPetar Avramovic2019-10-246-0/+1291
* [MIPS GlobalISel] MSA vector generic and builtin sdiv, srem, udiv, uremPetar Avramovic2019-10-246-0/+2532
* [MIPS GlobalISel] Select MSA vector generic and builtin mulPetar Avramovic2019-10-236-0/+651
* [MIPS GlobalISel] Select MSA vector generic and builtin subPetar Avramovic2019-10-236-0/+823
* [MIParser] Set RegClassOrRegBank during instruction parsingPetar Avramovic2019-10-222-32/+20
* [MIPS GlobalISel] Select MSA vector generic and builtin addPetar Avramovic2019-10-226-0/+831
* [MIPS GlobalISel] Add MSA registers to fprb. Select vector load, storePetar Avramovic2019-10-154-0/+530
* [update_mir_test_checks] Handle MI flags properlyRoman Tereshin2019-10-141-2/+2
* Add an operand to memory intrinsics to denote the "tail" marker.Amara Emerson2019-09-282-3/+3
* [MIPS GlobalISel] Lower aggregate structure return argumentsPetar Avramovic2019-09-262-0/+246
* [MIPS GlobalISel] VarArg argument lowering, select G_VASTART and vacopyPetar Avramovic2019-09-235-0/+508
* [MIPS GlobalISel] Select indirect branchPetar Avramovic2019-09-124-0/+196
* [MIPS GlobalISel] Lower G_DYN_STACKALLOCPetar Avramovic2019-09-122-0/+151
* [MIPS GlobalISel] Select G_IMPLICIT_DEFPetar Avramovic2019-09-124-0/+412
* [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir...Guillaume Chatelet2019-09-11100-467/+467
* [MIPS GlobalISel] Select G_FENCEPetar Avramovic2019-09-054-0/+103
* [MIPS GlobalISel] Select llvm.trap intrinsicPetar Avramovic2019-09-052-0/+36
* [MIPS GlobalISel] Lower SRet pointer argumentsPetar Avramovic2019-09-052-0/+77
* [MIPS GlobalISel] Lower uitofpPetar Avramovic2019-08-302-0/+445
* [MIPS GlobalISel] Lower fptouiPetar Avramovic2019-08-302-0/+490
* GlobalISel/TableGen: Handle setcc patternsMatt Arsenault2019-08-294-18/+6
* [MIPS GlobalISel] ClampScalar G_SHL, G_ASHR and G_LSHR Petar Avramovic2019-08-272-0/+395
* GlobalISel: Don't create G_UADDE with constant false carry inMatt Arsenault2019-08-222-58/+44
* [MIPS GlobalISel] NarrowScalar G_ZEXTLOAD and G_SEXTLOADPetar Avramovic2019-08-214-0/+200
* [MIPS GlobalISel] NarrowScalar G_ZEXT and G_SEXTPetar Avramovic2019-08-213-0/+152
* [MIPS GlobalISel] Consider type1 when legalizing shifts after r351882Petar Avramovic2019-08-211-6/+31
* [MIPS GlobalISel] NarrowScalar G_TRUNCPetar Avramovic2019-08-212-0/+43
* [globalisel] Add G_SEXT_INREGDaniel Sanders2019-08-098-37/+37
* [MIPS GlobalISel] Select jump_table and brjtPetar Avramovic2019-08-084-0/+1011
* [MIPS GlobalISel] Fold load/store + G_GEP + G_CONSTANTPetar Avramovic2019-08-017-41/+334
* [MIPS GlobalISel] Fix check for void return during lowerCallPetar Avramovic2019-07-261-0/+24
* [MIPS GlobalISel] Select inttoptr and ptrtointPetar Avramovic2019-07-264-0/+173
* [GlobalISel] Translate calls to memcpy et al to G_INTRINSIC_W_SIDE_EFFECTs an...Amara Emerson2019-07-191-12/+2
* [MIPS GlobalISel] ClampScalar and select pointer G_ICMPPetar Avramovic2019-07-174-554/+716
* [MIPS GlobalISel] Skip copies in addUseDef and addDefUsesPetar Avramovic2019-07-111-0/+82
* [MIPS GlobalISel] RegBankSelect for chains of ambiguous instructionsPetar Avramovic2019-07-1112-12/+4450
* [MIPS GlobalISel] Select float and double phiPetar Avramovic2019-07-102-23/+411
* [MIPS GlobalISel] Select float and double load and storePetar Avramovic2019-07-104-0/+232
* [MIPS GlobalISel] Register bank select for G_PHI. Select i64 phiPetar Avramovic2019-07-093-23/+501
OpenPOWER on IntegriCloud