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* MIR Serialization: Serialize the simple virtual register allocation hints.Alex Lorenz2015-07-242-0/+65
| | | | | | | This commit serializes the virtual register allocations hints of type 0. These hints specify the preferred physical registers for allocations. llvm-svn: 243156
* MIR Parser: Run the machine verifier after initializing machine functions.Alex Lorenz2015-07-242-4/+27
| | | | llvm-svn: 243128
* MIR Tests: Add liveins and successors to make tests pass with machine verifier.Alex Lorenz2015-07-2410-0/+15
| | | | | | | | This commit adds the liveins and successors properties to machine basic blocks in some of the MIR tests to ensure that the tests will pass when the MIR parser will run the machine verifier after initializing a machine function. llvm-svn: 243124
* MIR Tests: Make the basic block successor test an X86 specific test.Alex Lorenz2015-07-241-0/+80
| | | | | | | | | | | This commit moves and transforms the generic test 'CodeGen/MIR/successor-basic-blocks.mir' into an X86 specific test 'CodeGen/MIR/X86/successor-basic-blocks.mir'. This change is required in order to enable the machine verifier for the MIR parser, as the machine verifier verifies that the machine basic blocks contain instructions that actually determine the machine basic block successors. llvm-svn: 243123
* MIR Serialization: Serialize the '.cfi_offset' CFI instruction.Alex Lorenz2015-07-233-0/+135
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 243062
* MIR Serialization: Serialize the machine instruction's debug location.Alex Lorenz2015-07-222-0/+126
| | | | llvm-svn: 242938
* MIR Serialization: Serialize the metadata machine operands.Alex Lorenz2015-07-223-0/+186
| | | | llvm-svn: 242916
* MIR Serialization: Start serializing the CFI operands with .cfi_def_cfa_offset.Alex Lorenz2015-07-213-0/+89
| | | | | | | | This commit begins serialization of the CFI index machine operands by serializing one kind of CFI instruction - the .cfi_def_cfa_offset instruction. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242845
* MIR Serialization: Serialize the external symbol machine operands.Alex Lorenz2015-07-211-0/+60
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 242806
* MIR Serialization: Initial serialization of machine constant pools.Alex Lorenz2015-07-203-0/+172
| | | | | | | | | | This commit implements the initial serialization of machine constant pools and the constant pool index machine operands. The constant pool is serialized using a YAML sequence of YAML mappings that represent the constant values. The target-specific constant pool items aren't serialized by this commit. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242707
* MIR Parser: Add support for quoted named global value operands.Alex Lorenz2015-07-202-0/+43
| | | | | | | | | | This commit extends the machine instruction lexer and implements support for the quoted global value tokens. With this change the syntax for the global value identifier tokens becomes identical to the syntax for the global identifier tokens from the LLVM's assembly language. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242702
* MIR Parser: Allow the dollar characters in all of the identifier tokens.Alex Lorenz2015-07-171-0/+34
| | | | | | | | | | This commit modifies the machine instruction lexer so that it now accepts the '$' characters in identifier tokens. This change makes the syntax for unquoted global value tokens consistent with the syntax for the global idenfitier tokens in the LLVM's assembly language. llvm-svn: 242584
* MIR Serialization: Serialize the frame setup machine instruction flag.Alex Lorenz2015-07-171-0/+39
| | | | llvm-svn: 242491
* MIR Serialization: Serialize the frame index machine operands.Alex Lorenz2015-07-164-0/+155
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 242487
* Fix broken testcase from r242358.Alex Lorenz2015-07-161-1/+1
| | | | | | | The testcase failed on non X86 targets, because I forgot to pass the '-march=x86-64' option into llc for one of the X86 specific tests. llvm-svn: 242370
* MIR Serialization: Serialize the jump table index operands.Alex Lorenz2015-07-152-1/+183
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 242358
* MIR Serialization: Serialize the jump table info.Alex Lorenz2015-07-151-0/+62
| | | | | | | | | | | | | | The jump table info is serialized using a YAML mapping that contains its kind and a YAML sequence of jump table entries. A jump table entry is a YAML mapping that has an ID and an inline YAML sequence of machine basic block references. The testcase 'CodeGen/MIR/X86/jump-table-info.mir' doesn't have any instructions because one of them contains a jump table index operand. The jump table index operands will be serialized in a follow up patch, and the appropriate instructions will be added to this testcase. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242357
* MIR Serialization: Serialize references from the stack objects to named allocas.Alex Lorenz2015-07-153-6/+36
| | | | | | | | | This commit serializes the references to the named LLVM alloca instructions from the stack objects in the machine frame info. This commit adds a field 'Name' to the struct 'yaml::MachineStackObject'. This new field is used to store the name of the alloca instruction when the alloca is present and when it has a name. llvm-svn: 242339
* MIR Serialization: Serialize the machine basic block live in registers.Alex Lorenz2015-07-142-0/+46
| | | | llvm-svn: 242204
* MIR Serialization: Serialize the variable sized stack objects.Alex Lorenz2015-07-142-0/+78
| | | | llvm-svn: 242095
* MIR Serialization: Serialize the sub register indices.Alex Lorenz2015-07-133-0/+93
| | | | | | | | This commit serializes the sub register indices from the register machine operands. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242084
* MIR Serialization: Serialize the fixed stack objects.Alex Lorenz2015-07-134-0/+133
| | | | | | | | | | | | | This commit serializes the fixed stack objects, including fixed spill slots. The fixed stack objects are serialized using a YAML sequence of YAML inline mappings. Each mapping has the object's ID, type, size, offset, and alignment. The objects that aren't spill slots also serialize the isImmutable and isAliased flags. The fixed stack objects are a part of the machine function's YAML mapping. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242045
* MIR Serialization: Serialize the virtual register operands.Alex Lorenz2015-07-102-4/+102
| | | | | | | | Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D11005 llvm-svn: 241959
* MIR Serialization: Initial serialization of stack objects.Alex Lorenz2015-07-101-0/+39
| | | | | | | | | | | | | | This commit implements the initial serialization of stack objects from the MachineFrameInfo class. It can only serialize the ordinary stack objects (including ordinary spill slots), but it doesn't serialize variable sized or fixed stack objects yet. The stack objects are serialized using a YAML sequence of YAML inline mappings. Each mapping has the object's ID, type, size, offset and alignment. The stack objects are a part of machine function's YAML mapping. Reviewers: Duncan P. N. Exon Smith llvm-svn: 241922
* MIR Serialization: Serialize the virtual register definitions.Alex Lorenz2015-07-092-0/+61
| | | | | | | | | | | | The virtual registers are serialized using a YAML sequence of YAML inline mappings. Each mapping has the id of the virtual register and the register class. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10981 llvm-svn: 241868
* MIR Serialization: Serialize the 'undef' register machine operand flag.Alex Lorenz2015-07-081-0/+42
| | | | llvm-svn: 241762
* MIR Serialization: Serialize the 'killed' register machine operand flag.Alex Lorenz2015-07-081-0/+42
| | | | llvm-svn: 241734
* MIR Serialization: Serialize the 'dead' register machine operand flag.Alex Lorenz2015-07-071-0/+26
| | | | llvm-svn: 241624
* MIR Parser: Verify the implicit machine register operands.Alex Lorenz2015-07-0712-26/+142
| | | | | | | | | | | | This commit verifies that the parsed machine instructions contain the implicit register operands as specified by the MCInstrDesc. Variadic and call instructions aren't verified. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10781 llvm-svn: 241537
* MIR Serialization: Serialize the implicit register flag.Alex Lorenz2015-07-063-2/+65
| | | | | | | | | | | | | | This commit serializes the implicit flag for the register machine operands. It introduces two new keywords into the machine instruction syntax: 'implicit' and 'implicit-def'. The 'implicit' keyword is used for the implicit register operands, and the 'implicit-def' keyword is used for the register operands that have both the implicit and the define flags set. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10709 llvm-svn: 241519
* MIR Serialization: Serialize the register mask machine operands.Alex Lorenz2015-06-291-0/+43
| | | | | | | | | | | | | | | | | This commit implements serialization of the register mask machine operands. This commit serializes only the call preserved register masks that are defined by a target, it doesn't serialize arbitrary register masks. This commit also extends the TargetRegisterInfo class and TableGen so that the users of TRI can get the list of all the call preserved register masks and their names. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10673 llvm-svn: 240966
* MIR Serialization: Serialize global address machine operands.Alex Lorenz2015-06-263-0/+105
| | | | | | | | | | | | This commit serializes the global address machine operands. This commit doesn't serialize the operand's offset and target flags, it serializes only the global value reference. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10671 llvm-svn: 240851
* MIR Serialization: Serialize machine basic block operands.Alex Lorenz2015-06-2615-11/+246
| | | | | | | | | | | | | | | | | | | | | | | | | This commit serializes machine basic block operands. The machine basic block operands use the following syntax: %bb.<id>[.<name>] This commit also modifies the YAML representation for the machine basic blocks - a new, required field 'id' is added to the MBB YAML mapping. The id is used to resolve the MBB references to the actual MBBs. And while the name of the MBB can be included in a MBB reference, this name isn't used to resolve MBB references - as it's possible that multiple MBBs will reference the same BB and thus they will have the same name. If the name is specified, the parser will verify that it is equal to the name of the MBB with the specified id. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10608 llvm-svn: 240792
* MIR Serialization: Serialize the null register operands.Alex Lorenz2015-06-241-0/+23
| | | | | | | | | | | | This commit serializes the null register machine operands. It uses the '_' keyword to represent them, but the parser also allows the '%noreg' named register syntax. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10580 llvm-svn: 240558
* MIR Serialization: Serialize immediate machine operands.Alex Lorenz2015-06-231-0/+38
| | | | | | | | Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10573 llvm-svn: 240481
* MIR Parser: Use correct source locations for machine instruction diagnostics.Alex Lorenz2015-06-236-6/+6
| | | | | | | | | | | | This commit translates the source locations for MIParser diagnostics from the locations in the machine instruction string to the locations in the MIR file. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10574 llvm-svn: 240474
* MIR Serialization: Serialize physical register machine operands.Alex Lorenz2015-06-234-0/+83
| | | | | | | | | | | This commit introduces functionality that's used to serialize machine operands. Only the physical register operands are serialized by this commit. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10525 llvm-svn: 240425
* MIR Serialization: Introduce a lexer for machine instructions.Alex Lorenz2015-06-223-1/+37
| | | | | | | | | | | | This commit adds a function that tokenizes the string containing the machine instruction. This commit also adds a struct called 'MIToken' which is used to represent the lexer's tokens. Reviewers: Sean Silva Differential Revision: http://reviews.llvm.org/D10521 llvm-svn: 240323
* MIR Serialization: Serialize machine instruction names.Alex Lorenz2015-06-223-0/+46
This commit implements initial machine instruction serialization. It serializes machine instruction names. The instructions are represented using a YAML sequence of string literals and are a part of machine basic block YAML mapping. This commit introduces a class called 'MIParser' which will be used to parse the machine instructions and operands. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10481 llvm-svn: 240295
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