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* MIR Serialization: Use the global value syntax for global value memory operands.Alex Lorenz2015-08-202-8/+15
| | | | | | | | | | | This commit modifies the serialization syntax so that the global IR values in machine memory operands use the global value '@<name>' syntax instead of the current '%ir.<name>' syntax. The unnamed global IR values are handled by this commit as well, as the existing global value parsing method can parse the unnamed globals already. llvm-svn: 245527
* MIR Serialization: Serialize unnamed local IR values in memory operands.Alex Lorenz2015-08-191-0/+30
| | | | llvm-svn: 245521
* MIR Serialization: Serialize instruction's register ties.Alex Lorenz2015-08-196-0/+150
| | | | | | | | This commit serializes the machine instruction's register operand ties. The ties are printed out only when the instructon has register ties that are different from the ties that are specified in the instruction's description. llvm-svn: 245482
* MIR Serialization: Serialize defined registers that require 'def' register flag.Alex Lorenz2015-08-191-0/+29
| | | | | | | | | The defined registers are already serialized - they are represented by placing them before the '=' in a machine instruction. However, certain instructions like INLINEASM can have defined register operands after the '=', so this commit introduces the 'def' register flag for such operands. llvm-svn: 245480
* MIR Serialization: Serialize MMI's variable debug information.Alex Lorenz2015-08-193-0/+143
| | | | llvm-svn: 245396
* MIR Parser: Return true on error when parsing standalone registers.Alex Lorenz2015-08-181-0/+24
| | | | llvm-svn: 245384
* MIR Serialization: Serialize the frame information's stack protector index.Alex Lorenz2015-08-182-0/+146
| | | | llvm-svn: 245372
* MIR Parser: Implicit register verifier should accept unexpected implicitAlex Lorenz2015-08-181-0/+30
| | | | | | subregister operands. llvm-svn: 245315
* MIR Serialization: Serialize the memory operand's range metadata node.Alex Lorenz2015-08-171-0/+22
| | | | llvm-svn: 245247
* MIR Serialization: Serialize the memory operand's noalias metadata node.Alex Lorenz2015-08-171-1/+2
| | | | llvm-svn: 245246
* MIR Serialization: Serialize the memory operand's alias scope metadata node.Alex Lorenz2015-08-171-0/+33
| | | | llvm-svn: 245245
* MIR Serialization: Serialize the memory operand's TBAA metadata node.Alex Lorenz2015-08-172-0/+59
| | | | llvm-svn: 245244
* MIR Serialization: Change MIR syntax - use custom syntax for MBBs.Alex Lorenz2015-08-13120-1981/+1861
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit modifies the way the machine basic blocks are serialized - now the machine basic blocks are serialized using a custom syntax instead of relying on YAML primitives. Instead of using YAML mappings to represent the individual machine basic blocks in a machine function's body, the new syntax uses a single YAML block scalar which contains all of the machine basic blocks and instructions for that function. This is an example of a function's body that uses the old syntax: body: - id: 0 name: entry instructions: - '%eax = MOV32r0 implicit-def %eflags' - 'RETQ %eax' ... The same body is now written like this: body: | bb.0.entry: %eax = MOV32r0 implicit-def %eflags RETQ %eax ... This syntax change is motivated by the fact that the bundled machine instructions didn't map that well to the old syntax which was using a single YAML sequence to store all of the machine instructions in a block. The bundled machine instructions internally use flags like BundledPred and BundledSucc to determine the bundles, and serializing them as MI flags using the old syntax would have had a negative impact on the readability and the ease of editing for MIR files. The new syntax allows me to serialize the bundled machine instructions using a block construct without relying on the internal flags, for example: BUNDLE implicit-def dead %itstate, implicit-def %s1 ... { t2IT 1, 24, implicit-def %itstate %s1 = VMOVS killed %s0, 1, killed %cpsr, implicit killed %itstate } This commit also converts the MIR testcases to the new syntax. I developed a script that can convert from the old syntax to the new one. I will post the script on the llvm-commits mailing list in the thread for this commit. llvm-svn: 244982
* MIR Parser: Don't allow negative alignments for memory operands.Alex Lorenz2015-08-131-0/+32
| | | | llvm-svn: 244953
* MIR Parser: Allow the MI IR references to reference global values.Alex Lorenz2015-08-121-0/+21
| | | | | | | This commit fixes a bug where MI parser couldn't resolve the named IR references that referenced named global values. llvm-svn: 244817
* MIR Serialization: Serialize the fixed stack pseudo source values.Alex Lorenz2015-08-121-0/+41
| | | | llvm-svn: 244816
* MIR Serialization: Serialize the jump table pseudo source values.Alex Lorenz2015-08-121-0/+76
| | | | llvm-svn: 244813
* MIR Serialization: Serialize the GOT pseudo source values.Alex Lorenz2015-08-121-0/+23
| | | | llvm-svn: 244809
* MIR Serialization: Serialize the stack pseudo source values.Alex Lorenz2015-08-121-0/+35
| | | | llvm-svn: 244806
* MIR Serialization: Serialize the constant pool pseudo source values.Alex Lorenz2015-08-121-0/+26
| | | | llvm-svn: 244803
* MIR Serialization: Serialize UsedPhysRegMask from the machine register info.Alex Lorenz2015-08-111-0/+113
| | | | | | | | | | | | This commit serializes the UsedPhysRegMask register mask from the machine register information class. The mask is serialized as an inverted 'calleeSavedRegisters' mask to keep the output minimal. This commit also allows the MIR parser to infer this mask from the register mask operands if the machine function doesn't specify it. Reviewers: Duncan P. N. Exon Smith llvm-svn: 244548
* MIR Parser: Report an error when a stack object is redefined.Alex Lorenz2015-08-101-0/+38
| | | | llvm-svn: 244536
* MIR Parser: Report an error when a fixed stack object is redefined.Alex Lorenz2015-08-101-0/+30
| | | | llvm-svn: 244534
* MIR Serialization: Serialize the liveout register mask machine operands.Alex Lorenz2015-08-101-0/+43
| | | | llvm-svn: 244529
* MIR Serialization: Serialize the base alignment for the machine memory operands.Alex Lorenz2015-08-073-0/+95
| | | | llvm-svn: 244357
* MIR Serialization: Serialize the offsets for the machine memory operands.Alex Lorenz2015-08-071-0/+31
| | | | llvm-svn: 244356
* MIR Serialization: Fix serialization of unnamed IR block references.Alex Lorenz2015-08-061-1/+22
| | | | | | | | The block address machine operands can reference IR blocks in other functions. This commit fixes a bug where the references to unnamed IR blocks in other functions weren't serialized correctly. llvm-svn: 244299
* MIR Parser: Report an error when parsing duplicate memory operand flags.Alex Lorenz2015-08-061-0/+29
| | | | llvm-svn: 244240
* MIR Serialization: Serialize the 'invariant' machine memory operand flag.Alex Lorenz2015-08-061-0/+23
| | | | llvm-svn: 244230
* MIR Serialization: Serialize the 'non-temporal' machine memory operand flag.Alex Lorenz2015-08-061-0/+24
| | | | llvm-svn: 244228
* MIR Serialization: Initial serialization of the machine operand target flags.Alex Lorenz2015-08-064-0/+98
| | | | | | | | | | | | This commit implements the initial serialization of the machine operand target flags. It extends the 'TargetInstrInfo' class to add two new methods that help to provide text based serialization for the target flags. This commit can serialize only the X86 target flags, and the target flags for the other targets will be serialized in the follow-up commits. Reviewers: Duncan P. N. Exon Smith llvm-svn: 244185
* MIR Serialization: Serialize the machine operand's offset.Alex Lorenz2015-08-056-0/+142
| | | | | | | This commit serializes the offset for the following operands: target index, global address, external symbol, constant pool index, and block address. llvm-svn: 244157
* MIR Parser: Report an error when parsing large immediate operands.Alex Lorenz2015-08-051-0/+20
| | | | llvm-svn: 244100
* MIR Serialization: Serialize the typed immediate integer machine operands.Alex Lorenz2015-08-051-0/+35
| | | | llvm-svn: 244098
* MIR Parser: Report an error when parsing duplicate register flags.Alex Lorenz2015-08-051-0/+38
| | | | llvm-svn: 244081
* MIR Serialization: Serialize the 'early-clobber' register operand flag.Alex Lorenz2015-08-051-0/+46
| | | | llvm-svn: 244075
* MIR Serialization: Serialize the 'debug-use' register operand flag.Alex Lorenz2015-08-051-2/+2
| | | | llvm-svn: 244071
* MIR Serialization: Serialize the 'volatile' machine memory operand flag.Alex Lorenz2015-08-041-0/+26
| | | | llvm-svn: 243923
* MIR Serialization: Initial serialization of the machine memory operands.Alex Lorenz2015-08-039-0/+260
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 243915
* DI: Disallow uniquable DICompileUnitsDuncan P. N. Exon Smith2015-08-035-5/+5
| | | | | | | | | | | | | | | | | | Since r241097, `DIBuilder` has only created distinct `DICompileUnit`s. The backend is liable to start relying on that (if it hasn't already), so make uniquable `DICompileUnit`s illegal and automatically upgrade old bitcode. This is a nice cleanup, since we can remove an unnecessary `DenseSet` (and the associated uniquing info) from `LLVMContextImpl`. Almost all the testcases were updated with this script: git grep -e '= !DICompileUnit' -l -- test | grep -v test/Bitcode | xargs sed -i '' -e 's,= !DICompileUnit,= distinct !DICompileUnit,' I imagine something similar should work for out-of-tree testcases. llvm-svn: 243885
* MIR Parser: Report an error when a jump table entry is redefined.Alex Lorenz2015-07-311-0/+82
| | | | llvm-svn: 243798
* DI: Remove DW_TAG_arg_variable and DW_TAG_auto_variableDuncan P. N. Exon Smith2015-07-315-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | Remove the fake `DW_TAG_auto_variable` and `DW_TAG_arg_variable` tags, using `DW_TAG_variable` in their place Stop exposing the `tag:` field at all in the assembly format for `DILocalVariable`. Most of the testcase updates were generated by the following sed script: find test/ -name "*.ll" -o -name "*.mir" | xargs grep -l 'DILocalVariable' | xargs sed -i '' \ -e 's/tag: DW_TAG_arg_variable, //' \ -e 's/tag: DW_TAG_auto_variable, //' There were only a handful of tests in `test/Assembly` that I needed to update by hand. (Note: a follow-up could change `DILocalVariable::DILocalVariable()` to set the tag to `DW_TAG_formal_parameter` instead of `DW_TAG_variable` (as appropriate), instead of having that logic magically in the backend in `DbgVariable`. I've added a FIXME to that effect.) llvm-svn: 243774
* MIR Parser: Report an error when a constant pool item is redefined.Alex Lorenz2015-07-301-0/+27
| | | | llvm-svn: 243696
* MIR Parser: Report an error when a virtual register is redefined.Alex Lorenz2015-07-301-0/+28
| | | | llvm-svn: 243695
* MIR Serialization: Serialize the machine basic block's successor weights.Alex Lorenz2015-07-303-0/+128
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 243659
* MIR Serialization: Serialize the frame info's save and restore points.Alex Lorenz2015-07-291-0/+72
| | | | | | | This commit serializes the save and restore machine basic block references from the machine frame information class. llvm-svn: 243575
* MIR Serialization: Serialize the block address machine operands.Alex Lorenz2015-07-286-0/+257
| | | | llvm-svn: 243453
* MIR Serialization: Serialize the '.cfi_def_cfa_register' CFI instruction.Alex Lorenz2015-07-271-0/+33
| | | | llvm-svn: 243322
* MIR Serialization: Serialize the machine function's liveins.Alex Lorenz2015-07-273-0/+94
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 243288
* MIR Serialization: Serialize MachineFrameInfo's callee saved information.Alex Lorenz2015-07-242-0/+189
| | | | | | | | | This commit serializes the callee saved information from the class 'MachineFrameInfo'. This commit extends the YAML mappings for the fixed and the ordinary stack objects and adds an optional 'callee-saved-register' attribute. This attribute is used to serialize the callee save information. llvm-svn: 243173
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