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* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-5/+5
| | | | | | | | | | | | Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
* [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.Puyan Lotfi2018-01-101-1/+1
| | | | | | | | | | Planning to add support for named vregs. This puts is in a conundrum since physregs are named as well. To rectify this we need to use a sigil other than '%' for physregs in MIR. We've settled on using '$' for physregs but first we must repurpose it from external symbols using it, which is what this commit is all about. We think '&' will have familiar semantics for C/C++ users. llvm-svn: 322146
* MIRParser/MIRPrinter: Compute HasInlineAsm instead of printing/parsing itMatthias Braun2016-08-241-1/+0
| | | | llvm-svn: 279680
* llc: Add support for -run-pass noneMatthias Braun2016-07-161-1/+1
| | | | | | | | | | This does not schedule any passes besides the ones necessary to construct and print the machine function. This is useful to test .mir file reading and printing. Differential Revision: http://reviews.llvm.org/D22432 llvm-svn: 275664
* MIR Serialization: Serialize instruction's register ties.Alex Lorenz2015-08-191-0/+25
This commit serializes the machine instruction's register operand ties. The ties are printed out only when the instructon has register ties that are different from the ties that are specified in the instruction's description. llvm-svn: 245482
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