summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/MIR/X86/standalone-register-error.mir
Commit message (Collapse)AuthorAgeFilesLines
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-5/+5
| | | | | | | | | | | | Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
* MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.Matthias Braun2016-08-241-1/+0
| | | | | | | | | Specifying isSSA is an extra line at best and results in invalid MI at worst. Compute the value instead. Differential Revision: http://reviews.llvm.org/D22722 llvm-svn: 279600
* llc: Add support for -run-pass noneMatthias Braun2016-07-161-1/+1
| | | | | | | | | | This does not schedule any passes besides the ones necessary to construct and print the machine function. This is useful to test .mir file reading and printing. Differential Revision: http://reviews.llvm.org/D22432 llvm-svn: 275664
* MIR Parser: Return true on error when parsing standalone registers.Alex Lorenz2015-08-181-0/+24
llvm-svn: 245384
OpenPOWER on IntegriCloud