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* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-315-90/+90
* Move tests to the correct placeMatthias Braun2018-01-197-276/+0
* [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.Puyan Lotfi2018-01-101-1/+1
* [CodeGen] Always use `printReg` to print registers in both MIR and debugFrancis Visoiu Mistrih2017-11-305-19/+19
* [IfConversion] Add testcases [NFC]Mikael Holmen2017-09-206-0/+211
* [MIRPrinter] Print empty successor lists when they cannot be guessedQuentin Colombet2017-09-191-1/+2
* [MIR] Print target-specific constant poolsDiana Picus2017-08-021-0/+27
* Revert "[IfConversion] Keep the CFG updated incrementally in IfConvertTriangle"Tobias Grosser2017-05-291-24/+0
* [IfConversion] Keep the CFG updated incrementally in IfConvertTriangleMikael Holmen2017-05-121-0/+24
* [IfConversion] Add missing check in IfConversion/canFallThroughToMikael Holmen2017-05-101-0/+64
* Move test to correct directoryMatthias Braun2016-12-171-157/+0
* Move .mir tests to appropriate directoriesMatthias Braun2016-12-092-119/+0
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compu...Matthias Braun2016-08-251-1/+0
* MIRParser/MIRPrinter: Compute HasInlineAsm instead of printing/parsing itMatthias Braun2016-08-241-1/+0
* MachineRegisterInfo/MIR: Initialize tracksSubRegLiveness early, do not print/...Matthias Braun2016-08-241-1/+0
* MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.Matthias Braun2016-08-241-1/+0
* MIRParser: Use shorter cfi identifiersMatthias Braun2016-07-262-18/+18
* llc: Add support for -run-pass noneMatthias Braun2016-07-165-5/+5
* ARM/MIR: Move test from MIR to CodeGen/ARM directoryMatthias Braun2016-07-161-164/+0
* [MIR] Print on the given output instead of stderr.Quentin Colombet2016-07-135-5/+5
* PeepholeOptimizer: Make pass name match DEBUG_TYPEMatt Arsenault2016-07-082-2/+2
* ARM: fix handling of SUB immediates in peephole opt.Tim Northover2016-05-022-0/+119
* tests: tweak MIR for ARM tests to correct MI issuesSaleem Abdulrasool2016-04-262-5/+7
* test: remove some bleeding whitespaceSaleem Abdulrasool2016-04-262-57/+57
* [PR27284] Reverse the ownership between DICompileUnit and DISubprogram.Adrian Prantl2016-04-152-6/+4
* CodeGen: Clear the MFI's save and restore point after PrologEpilogInserterJustin Bogner2016-04-121-2/+0
* Add MachineFunctionProperty checks for AllVRegsAllocated for target passesDerek Schuff2016-04-041-0/+1
* testcase gardening: update the emissionKind enum to the new syntax. (NFC)Adrian Prantl2016-04-012-2/+2
* Introduce MachineFunctionProperties and the AllVRegsAllocated propertyDerek Schuff2016-03-281-0/+1
* When printing MIR, output to errs() rather than outs().Justin Lebar2016-02-192-2/+2
* Convert the CodeGen/ARM/sched-it-debug-nodes.ll testcase from IR -> MIR.Adrian Prantl2015-12-211-0/+160
* Teach ARMLoadStoreOptimizer to ignore DBG_VALUE instructions when mergingAdrian Prantl2015-12-211-0/+165
* MIR Serialization: Serialize the '.cfi_same_value' CFI directive.Alex Lorenz2015-08-141-0/+80
* MIR Serialization: Serialize the 'internal' register operand flag.Alex Lorenz2015-08-141-5/+5
* MIR Serialization: Serialize the bundled machine instructions.Alex Lorenz2015-08-145-0/+177
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