| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [Hexagon] Reorganize and update instruction patterns | Krzysztof Parzyszek | 2017-10-20 | 1 | -16/+19 |
| | | | | | llvm-svn: 316228 | ||||
| * | [Hexagon] Replace instruction definitions with auto-generated ones | Krzysztof Parzyszek | 2017-02-10 | 1 | -3/+3 |
| | | | | | llvm-svn: 294753 | ||||
| * | [Hexagon] Split double registers | Krzysztof Parzyszek | 2015-10-16 | 1 | -1/+1 |
| | | | | | llvm-svn: 250549 | ||||
| * | [Hexagon] Use A2_tfrsi for constant pool and jump table addresses | Krzysztof Parzyszek | 2015-04-22 | 1 | -1/+1 |
| | | | | | llvm-svn: 235535 | ||||
| * | [opaque pointer type] Add textual IR support for explicit type parameter to ↵ | David Blaikie | 2015-02-27 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794 | ||||
| * | Hexagon: Pass to replace tranfer/copy instructions into combine instruction | Jyotsna Verma | 2013-05-14 | 1 | -0/+35 |
| where possible. llvm-svn: 181817 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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