Commit message (Collapse) | Author | Age | Files | Lines | |
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* | [Hexagon] Improve generated code for test-if-bit-clear, one more time | Krzysztof Parzyszek | 2019-09-04 | 1 | -2/+2 |
| | | | | | | Adjust isel patterns after recent commit. Fixes https://llvm.org/PR43194. llvm-svn: 370913 | ||||
* | UpdateTestChecks: hexagon support | Roman Lebedev | 2019-06-05 | 1 | -12/+67 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: These tests are being affected by an upcoming patch, so having an understandable (autogenerated) diff is helpful. This target, again, prefers `-march`: ``` llvm/test/CodeGen/Hexagon$ grep -r triple | wc -l 467 llvm/test/CodeGen/Hexagon$ grep -r march | wc -l 1167 ``` Reviewers: RKSimon, kparzysz Reviewed By: kparzysz Subscribers: xbolva00, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62867 llvm-svn: 362605 | ||||
* | [Hexagon] Add patterns to select A2_combine_ll and its variants | Krzysztof Parzyszek | 2017-11-22 | 1 | -1/+1 |
| | | | | llvm-svn: 318876 | ||||
* | [Hexagon] Prefer L2_loadrub_io over L4_loadrub_rr | Krzysztof Parzyszek | 2017-11-02 | 1 | -0/+10 |
| | | | | | | | If the offset is an immediate, avoid putting it in a register to get Rs+Rt<<#0. llvm-svn: 317275 | ||||
* | [Hexagon] Adjust patterns to reflect instruction selection preferences | Krzysztof Parzyszek | 2017-10-27 | 1 | -0/+57 |
llvm-svn: 316804 |