| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [Hexagon] Update more testcases | Krzysztof Parzyszek | 2018-03-06 | 1 | -2/+1 |
| | | | | | llvm-svn: 326830 | ||||
| * | [Hexagon] Replace instruction definitions with auto-generated ones | Krzysztof Parzyszek | 2017-02-10 | 1 | -1/+1 |
| | | | | | llvm-svn: 294753 | ||||
| * | [Hexagon] Preprocess mapped instructions before lowering to MC | Krzysztof Parzyszek | 2015-12-15 | 1 | -1/+1 |
| | | | | | llvm-svn: 255653 | ||||
| * | [Hexagon] Bit-based instruction simplification | Krzysztof Parzyszek | 2015-10-20 | 1 | -0/+53 |
| Analyze bit patterns of operands and values of instructions to perform various simplifications, dead/redundant code elimination, etc. llvm-svn: 250868 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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