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* Add a test case for PR15318 fixed in r177472Hao Liu2013-03-201-0/+7
| | | | llvm-svn: 177489
* For inline asm:Eric Christopher2013-01-111-0/+21
| | | | | | | | | | | - recognize string "{memory}" in the MI generation - mark as mayload/maystore when there's a memory clobber constraint. PR14859. Patch by Krzysztof Parzyszek llvm-svn: 172228
* After reducing the size of an operation in the DAG we zero-extend the reducedNadav Rotem2012-12-191-0/+21
| | | | | | | | bitwidth op back to the original size. If we reduce ANDs then this can cause an endless loop. This patch changes the ZEXT to ANY_EXTEND if the demanded bits are equal or smaller than the size of the reduced operation. llvm-svn: 170505
* move X86-specific testPaul Redmond2012-12-111-8/+0
| | | | | | | | This test case uses -mcpu=corei7 so it belongs in CodeGen/X86 Reviewed by: Nadav llvm-svn: 169801
* Codegen support for arbitrary vector getelementptrs.Duncan Sands2012-11-131-0/+5
| | | | llvm-svn: 167830
* BranchProb: modify the definition of an edge in BranchProbabilityInfo to handleManman Ren2012-08-241-0/+32
| | | | | | | | | | | | | | the case of multiple edges from one block to another. A simple example is a switch statement with multiple values to the same destination. The definition of an edge is modified from a pair of blocks to a pair of PredBlock and an index into the successors. Also set the weight correctly when building SelectionDAG from LLVM IR, especially when converting a Switch. IntegersSubsetMapping is updated to calculate the weight for each cluster. llvm-svn: 162572
* Fix broken check lines.Benjamin Kramer2012-08-171-2/+2
| | | | | | | | I really need to find a way to automate this, but I can't come up with a regex that has no false positives while handling tricky cases like custom check prefixes. llvm-svn: 162097
* The normal edge of an invoke is not allowed to branch to a block with aEli Friedman2012-08-101-19/+0
| | | | | | landingpad. Enforce it in the verifier, and fix the regression tests to match. llvm-svn: 161697
* Fix a bug in the scalarization of BUILD_VECTOR. BUILD_VECTOR elements may be ↵Nadav Rotem2012-07-151-0/+8
| | | | | | | | wider than the output element type. Make sure to trunc them if needed. Together with Michael Kuperstein <michael.m.kuperstein@intel.com> llvm-svn: 160235
* Extend TargetPassConfig to allow running only a subset of the normal passes.Bob Wilson2012-07-021-0/+10
| | | | | | | | | | | | | | | | | This is still a work in progress but I believe it is currently good enough to fix PR13122 "Need unit test driver for codegen IR passes". For example, you can run llc with -stop-after=loop-reduce to have it dump out the IR after running LSR. Serializing machine-level IR is not yet supported but we have some patches in progress for that. The plan is to serialize the IR to a YAML file, containing separate sections for the LLVM IR, machine-level IR, and whatever other info is needed. Chad suggested that we stash the stop-after pass in the YAML file and use that instead of the start-after option to figure out where to restart the compilation. I think that's a great idea, but since it's not implemented yet I put the -start-after option into this patch for testing purposes. llvm-svn: 159570
* Convert the uses of '|&' to use '2>&1 |' instead, which works on oldChandler Carruth2012-07-022-4/+4
| | | | | | | | | | versions of Bash. In addition, I can back out the change to the lit built-in shell test runner to support this. This should fix the majority of fallout on Darwin, but I suspect there will be a few straggling issues. llvm-svn: 159544
* add a new @llvm.donothing intrinsic that, well, does nothing, and teach ↵Nuno Lopes2012-06-281-0/+31
| | | | | | CodeGen to ignore calls to it llvm-svn: 159383
* Fix llc's -print-before=pass and -print-after=pass.Rafael Espindola2012-06-261-0/+6
| | | | llvm-svn: 159227
* There are a number of generic inline asm operand modifiers thatJack Carter2012-06-261-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | up to r158925 were handled as processor specific. Making them generic and putting tests for these modifiers in the CodeGen/Generic directory caused a number of targets to fail. This commit addresses that problem by having the targets call the generic routine for generic modifiers that they don't currently have explicit code for. For now only generic print operands 'c' and 'n' are supported.vi Affected files: test/CodeGen/Generic/asm-large-immediate.ll lib/Target/PowerPC/PPCAsmPrinter.cpp lib/Target/NVPTX/NVPTXAsmPrinter.cpp lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/XCore/XCoreAsmPrinter.cpp lib/Target/X86/X86AsmPrinter.cpp lib/Target/Hexagon/HexagonAsmPrinter.cpp lib/Target/CellSPU/SPUAsmPrinter.cpp lib/Target/Sparc/SparcAsmPrinter.cpp lib/Target/MBlaze/MBlazeAsmPrinter.cpp lib/Target/Mips/MipsAsmPrinter.cpp MSP430 isn't represented because it did not even run with the long existing 'c' modifier and it was not apparent what needs to be done to get it inline asm ready. Contributer: Jack Carter llvm-svn: 159203
* Enforce stricter liveness rules for PHIs.Jakob Stoklund Olesen2012-06-251-0/+26
| | | | | | | | | | | | | Verify that all paths from the entry block to a virtual register read pass through a def. Enable this check even when MRI->isSSA() is false. Verify that the live range of a virtual register is live out of all predecessor blocks, even for PHI-values. This requires that PHIElimination sometimes inserts IMPLICIT_DEF instruction in predecessor blocks. llvm-svn: 159150
* test/CodeGen/Generic/asm-large-immediate.ll: Mark it as XFAIL: powerpc, ↵NAKAMURA Takumi2012-06-221-1/+3
| | | | | | possibly due to r158939. llvm-svn: 158994
* The inline asm operand modifier 'n' is suppose Jack Carter2012-06-211-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | to be generic across architectures. It has the following description in the gnu sources: Negate the immediate constant Several Architectures such as x86 have local implementations of operand modifier 'n' which go beyond the above description slightly. This won't affect them. Affected files: lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Added 'n' to the switch cases. test/CodeGen/Generic/asm-large-immediate.ll Generic compiled test (x86 for me) test/CodeGen/Mips/asm-large-immediate.ll Mips compiled version of the generic one Contributer: Jack Carter llvm-svn: 158939
* Revert r158209, "test/CodeGen/Generic/APIntLoadStore.ll: Mark as XFAIL:ppc ↵NAKAMURA Takumi2012-06-211-1/+0
| | | | | | | | since r157911." It passes according to ppc changes. llvm-svn: 158917
* Fix test case to work on ARM.Jakob Stoklund Olesen2012-06-111-2/+3
| | | | | | Patch by James Benton! llvm-svn: 158316
* Don't run RAFast in the optimizing regalloc pipeline.Jakob Stoklund Olesen2012-06-082-2/+2
| | | | | | | | | | | The fast register allocator is not supposed to work in the optimizing pipeline. It doesn't make sense to compute live intervals, run full copy coalescing, and then run RAFast. Fast register allocation in the optimizing pipeline is better done by RABasic. llvm-svn: 158242
* Fix a crash in APInt::lshr when shiftAmt > BitWidth.Chad Rosier2012-06-081-0/+8
| | | | | | Patch by James Benton <jbenton@vmware.com>. llvm-svn: 158213
* test/CodeGen/Generic/APIntLoadStore.ll: Mark as XFAIL:ppc since r157911.NAKAMURA Takumi2012-06-081-0/+1
| | | | llvm-svn: 158209
* Add an insertPass API to TargetPassConfig. <rdar://problem/11498613>Bob Wilson2012-05-301-0/+14
| | | | | | | | | | Besides adding the new insertPass function, this patch uses it to enhance the existing -print-machineinstrs so that the MachineInstrs after a specific pass can be printed. Patch by Bin Zeng! llvm-svn: 157655
* revert my previous patches that introduced an additional parameter to the ↵Nuno Lopes2012-05-222-18/+2
| | | | | | | | objectsize intrinsic. After a lot of discussion, we realized it's not the best option for run-time bounds checking llvm-svn: 157255
* change the objectsize intrinsic signature: add a 3rd parameter to denote the ↵Nuno Lopes2012-05-092-2/+18
| | | | | | | | maximum runtime performance penalty that the user is willing to accept. This commit only adds the parameter. Code taking advantage of it will follow. llvm-svn: 156473
* Move to X86 directory because this fails on non-X86 platforms.Bill Wendling2012-04-161-59/+0
| | | | llvm-svn: 154825
* Don't try to zExt just to check if an integer constant is zero, it mightRafael Espindola2012-04-101-0/+18
| | | | | | not fit in a i64. llvm-svn: 154364
* Add VSELECT to LegalizeVectorTypes::ScalariseVectorResult. Previously it ↵Pete Cooper2012-04-031-0/+8
| | | | | | would crash if it encountered a 1 element VSELECT. Solution is slightly more complicated than just creating a SELET as we have to mask or sign extend the vector condition if it had different boolean contents from the scalar condition. Fixes <rdar://problem/11178095> llvm-svn: 153976
* Add testcase for r153705Bill Wendling2012-03-301-0/+59
| | | | llvm-svn: 153706
* misched: tag a few XFAILs that I plan to fixAndrew Trick2012-03-211-20/+0
| | | | llvm-svn: 153222
* I meant to disable this test, not XFAIL itAndrew Trick2012-03-211-2/+2
| | | | llvm-svn: 153165
* misched: beginning to add unit testsAndrew Trick2012-03-211-0/+20
| | | | llvm-svn: 153163
* Replace all instances of dg.exp file with lit.local.cfg, since all tests are ↵Eli Bendersky2012-02-162-3/+1
| | | | | | | | run with LIT now and now Dejagnu. dg.exp is no longer needed. Patch reviewed by Daniel Dunbar. It will be followed by additional cleanup patches. llvm-svn: 150664
* Move test/CodeGen/Generic/2012-02-01-CoalescerBug.ll to CodeGen/ARM, for ↵NAKAMURA Takumi2012-02-021-26/+0
| | | | | | | | now. It requires TARGETS=arm. I cannot reproduce a fixed issue with other targets. llvm-svn: 149604
* PR11868. The previous loop in LiveIntervals::join would sometimes fall over ifLang Hames2012-02-021-0/+26
| | | | | | | more than two adjacent ranges needed to be merged. The new version should be able to handle an arbitrary sequence of adjancent ranges. llvm-svn: 149588
* Remove all references to the old EH.Bill Wendling2012-01-312-4/+0
| | | | | | There was always the current EH. -- Ministry of Truth llvm-svn: 149335
* Manually upgrade the test suite to specify the flag to cttz and ctlz.Chandler Carruth2011-12-122-20/+20
| | | | | | | | | | | | | | | | | | | | | | | I followed three heuristics for deciding whether to set 'true' or 'false': - Everything target independent got 'true' as that is the expected common output of the GCC builtins. - If the target arch only has one way of implementing this operation, set the flag in the way that exercises the most of codegen. For most architectures this is also the likely path from a GCC builtin, with 'true' being set. It will (eventually) require lowering away that difference, and then lowering to the architecture's operation. - Otherwise, set the flag differently dependending on which target operation should be tested. Let me know if anyone has any issue with this pattern or would like specific tests of another form. This should allow the x86 codegen to just iteratively improve as I teach the backend how to differentiate between the two forms, and everything else should remain exactly the same. llvm-svn: 146370
* Remove the the test which checks the saving of a vector of booleans into memory.Nadav Rotem2011-10-161-11/+0
| | | | | | | | The decision was to pack the bits. Currently no codegen supports this. Currently, all of the bits in the vector are saved into the same address in memory. llvm-svn: 142149
* PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL ↵David Meyer2011-09-261-1/+0
| | | | | | 2011-06-09-TailCallByVal and 2010-11-04-BigByval llvm-svn: 140516
* This test is completely invalid with the modern EH model. Delete.Bill Wendling2011-09-201-17/+0
| | | | llvm-svn: 140213
* This test is already covered by llvm/trunk/test/CodeGen/X86/vsel.llNadav Rotem2011-09-081-15/+0
| | | | llvm-svn: 139288
* Add X86-SSE4 codegen support for vector-select.Nadav Rotem2011-09-081-1/+1
| | | | llvm-svn: 139285
* Revert r129875, XFAILing this test for arm, since the fix was reverted.Dan Gohman2011-09-031-0/+1
| | | | llvm-svn: 139058
* Try to eliminate the use of the 'unwind' instruction.Bill Wendling2011-09-021-1/+1
| | | | llvm-svn: 139046
* XFAIL this test on arm until the backend is fixed.Benjamin Kramer2011-09-011-0/+3
| | | | llvm-svn: 138955
* Revert r138894. This was failing on cmake-clang-i686-msvc10.Bill Wendling2011-08-311-3/+0
| | | | llvm-svn: 138900
* Update more tests to the new EH scheme.Bill Wendling2011-08-311-0/+3
| | | | llvm-svn: 138894
* Revert r138606 until LowerInvoke has been converted to the new EH scheme.Bill Wendling2011-08-261-4/+1
| | | | llvm-svn: 138656
* Update to the new EH scheme.Bill Wendling2011-08-258-9/+40
| | | | llvm-svn: 138606
* LSR wants to split the landing pad's critical edge. Let it do it, but use theBill Wendling2011-08-251-0/+29
| | | | | | proper function to do it. llvm-svn: 138550
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