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* remove an xfailed test.Chris Lattner2008-10-171-26/+0
| | | | llvm-svn: 57695
* Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTRBill Wendling2008-08-311-5/+0
| | | | | | | | instructions in CellSPU as "Expand" so that they won't be generated. I added a "FIXME" so that this hack can be addressed and reverted once ISD::ROTR is supported in the .td files. llvm-svn: 55582
* CellSPU doesn't appear to support fully the "ISD::ROTR" operation. The DAGBill Wendling2008-08-311-0/+6
| | | | | | | | combiner can now generate ROTR if the backend says that it can handle it. Cell SPU says this, but gets an error from code gen saying that it can't select ROTR. I'm xfailing this test until this can be fixed. llvm-svn: 55579
* Add necessary 64-bit support so that gcc frontend compiles (mostly). CurrentScott Michel2008-06-021-12/+12
| | | | | | | issue is operand promotion for setcc/select... but looks like the fundamental stuff is implemented for CellSPU. llvm-svn: 51884
* sabre brings to my attention that the 'tr' suffix is also obsoleteGabor Greif2008-05-201-1/+1
| | | | llvm-svn: 51349
* Rename the last test with .llx extension to .ll, resolve duplicate test by ↵Gabor Greif2008-05-201-1/+1
| | | | | | renaming to isnan2. Now that no test has llx ending there is no need to search for them from dg.exp too. llvm-svn: 51328
* Update and_ops.ll according to the recent dagcombiner changes.Dan Gohman2008-04-282-2/+28
| | | | | | | | Add a new test, and_ops_more.ll, which is XFAIL'd, to record the parts of and_ops.ll that were affected by this change. llvm-svn: 50379
* Upgrade these tests for the current intrinsic prototypes.Dan Gohman2008-04-141-6/+6
| | | | llvm-svn: 49669
* Add more patterns to match in the integer comparison test harnesses.Scott Michel2008-03-203-7/+26
| | | | | | | | Fix bugs encountered, mostly due to range matching for immediates; the CellSPU's 10-bit immediates are sign extended, covering a larger range of unsigned values. llvm-svn: 48575
* - Style cleanup in IA64ISelLowering.h: add 'virtual' keyword for consistency.Scott Michel2008-03-101-0/+10
| | | | | | | - Add test pattern matching in CellSPU's icmp32.ll test harness - Fix CellSPU fcmp.ll-generated assert. llvm-svn: 48197
* Integer comparison tests for CellSPU.Scott Michel2008-03-103-0/+957
| | | | llvm-svn: 48152
* Refine Cell's i64 constant generation code to cover more constants where theScott Michel2008-03-061-1/+5
| | | | | | upper and lower 32-bits are the same (in addition to 0 and -1 previously.) llvm-svn: 47985
* - Expand tabs to spaces.Scott Michel2008-03-0524-879/+1158
| | | | | | | | - select_bits.ll now fully functional now that PR1993 is closed. It was previously broken by refactoring in SPUInstrInfo.td and using multiclasses. - Same for eqv.ll llvm-svn: 47972
* Merge current work back to tree to minimize diffs and drift. Major highlightsScott Michel2008-02-231-3/+2
| | | | | | | | | | | | | | for CellSPU modifications: - SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend. - Other improvements based on refactoring effort in SPUISelLowering.cpp, esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and rotates are now eliminiated, other scalar-to-vector-to-scalar silliness is also eliminated. - 64-bit operations are being implemented, _muldi3.c gcc runtime now compiles and generates the right code. More work still needs to be done. llvm-svn: 47532
* Overhaul Cell SPU's addressing mode internals so that there are nowScott Michel2008-01-296-194/+79
| | | | | | | | | | | | | | only two addressing mode nodes, SPUaform and SPUindirect (vice the three previous ones, SPUaform, SPUdform and SPUxform). This improves code somewhat because we now avoid using reg+reg addressing when it can be avoided. It also simplifies the address selection logic, which was the main point for doing this. Also, for various global variables that would be loaded using SPU's A-form addressing, prefer D-form offs[reg] addressing, keeping the base in a register if the variable is used more than once. llvm-svn: 46483
* remove extraneous &&'s from tests, as Scott is apparently not going to.Chris Lattner2008-01-1820-160/+160
| | | | llvm-svn: 46173
* Forward progress: crtbegin.c now compiles successfully!Scott Michel2008-01-173-11/+112
| | | | | | | | | | | | | Fixed CellSPU's A-form (local store) address mode, so that all globals, externals, constant pool and jump table symbols are now wrapped within a SPUISD::AFormAddr pseudo-instruction. This now identifies all local store memory addresses, although it requires a bit of legerdemain during instruction selection to properly select loads to and stores from local store, properly generating "LQA" instructions. Also added mul_ops.ll test harness for exercising integer multiplication. llvm-svn: 46142
* More CellSPU refinements:Scott Michel2008-01-113-3/+163
| | | | | | | | | | | | - struct_2.ll: Completely unaligned load/store testing - call_indirect.ll, struct_1.ll: Add test lines to exercise X-form [$reg($reg)] addressing At this point, loads and stores should be under control (he says in an optimistic tone of voice.) llvm-svn: 45882
* More CellSPU refinement and progress:Scott Michel2008-01-1123-0/+467
| | | | | | | | | | | | | | | | | | | | - Cleaned up custom load/store logic, common code is now shared [see note below], cleaned up address modes - More test cases: various intrinsics, structure element access (load/store test), updated target data strings, indirect function calls. Note: This patch contains a refactoring of the LoadSDNode and StoreSDNode structures: they now share a common base class, LSBaseSDNode, that provides an interface to their common functionality. There is some hackery to access the proper operand depending on the derived class; otherwise, to do a proper job would require finding and rearranging the SDOperands sent to StoreSDNode's constructor. The current refactor errs on the side of being conservatively and backwardly compatible while providing functionality that reduces redundant code for targets where loads and stores are custom-lowered. llvm-svn: 45851
* More working CellSPU tests:Scott Michel2007-12-202-0/+236
| | | | | | | - vec_const.ll: Vector constant loads - immed64.ll: i64, f64 constant loads llvm-svn: 45242
* CellSPU testcase, extract_elt.ll: extract vector element.Scott Michel2007-12-191-0/+175
| | | | llvm-svn: 45219
* More working CellSPU test cases:Scott Michel2007-12-1912-0/+1164
| | | | | | | | | | | | | | | | | - call.ll: Function call - ctpop.ll: Count population - dp_farith.ll: DP arithmetic - eqv.ll: Equivalence primitives - fcmp.ll: SP comparisons - fdiv.ll: SP division - fneg-fabs.ll: SP negation, aboslute value - int2fp.ll: Integer -> SP conversion - rotate_ops.ll: Rotation primitives - select_bits.ll: (a & c) | (b & ~c) bit selection - shift_ops.ll: Shift primitives - sp_farith.ll: SP arithmentic llvm-svn: 45217
* Two more test cases: or_ops.ll (arithmetic or operations) and vecinsert.llScott Michel2007-12-193-0/+320
| | | | | | (vector insertions) llvm-svn: 45216
* Add new immed16.ll test case, fix CellSPU errata to make test case work.Scott Michel2007-12-191-0/+38
| | | | llvm-svn: 45196
* i32 immediate constant test case for CellSPUScott Michel2007-12-171-0/+70
| | | | llvm-svn: 45134
* - Restore some i8 functionality in CellSPUScott Michel2007-12-172-8/+133
| | | | | | - New test case: nand.ll llvm-svn: 45130
* Start committing working test cases for CellSPU.Scott Michel2007-12-151-0/+270
llvm-svn: 45050
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