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authorScott Michel <scottm@aero.org>2008-03-10 23:49:09 +0000
committerScott Michel <scottm@aero.org>2008-03-10 23:49:09 +0000
commit92275427e59174699bd23fc4f31c45d6f8a63cca (patch)
tree60a56252d298b865337e178d5513dff7998cf442 /llvm/test/CodeGen/CellSPU
parent2a3aeb1f7210ba355f594a59373a33a74ce21d40 (diff)
downloadbcm5719-llvm-92275427e59174699bd23fc4f31c45d6f8a63cca.tar.gz
bcm5719-llvm-92275427e59174699bd23fc4f31c45d6f8a63cca.zip
- Style cleanup in IA64ISelLowering.h: add 'virtual' keyword for consistency.
- Add test pattern matching in CellSPU's icmp32.ll test harness - Fix CellSPU fcmp.ll-generated assert. llvm-svn: 48197
Diffstat (limited to 'llvm/test/CodeGen/CellSPU')
-rw-r--r--llvm/test/CodeGen/CellSPU/icmp32.ll10
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/CellSPU/icmp32.ll b/llvm/test/CodeGen/CellSPU/icmp32.ll
index daa673b8d61..0a7f1f5c306 100644
--- a/llvm/test/CodeGen/CellSPU/icmp32.ll
+++ b/llvm/test/CodeGen/CellSPU/icmp32.ll
@@ -1,4 +1,14 @@
; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
+; RUN: grep ila %t1.s | count 6
+; RUN: grep ceq %t1.s | count 28
+; RUN: grep ceqi %t1.s | count 11
+; RUN: grep clgt %t1.s | count 16
+; RUN: grep clgti %t1.s | count 5
+; RUN: grep cgt %t1.s | count 16
+; RUN: grep cgti %t1.s | count 6
+; RUN: grep {selb\t\\\$3, \\\$6, \\\$5, \\\$3} %t1.s | count 7
+; RUN: grep {selb\t\\\$3, \\\$5, \\\$6, \\\$3} %t1.s | count 3
+; RUN: grep {selb\t\\\$3, \\\$5, \\\$4, \\\$3} %t1.s | count 20
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
target triple = "spu"
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