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* Update tests.Evan Cheng2009-10-251-5/+10
| | | | llvm-svn: 85050
* Revert 84843. Evan, this was breaking some of the if-conversion tests.Bob Wilson2009-10-221-2/+1
| | | | llvm-svn: 84868
* Move if-conversion before post-regalloc scheduling so the predicated ↵Evan Cheng2009-10-221-1/+2
| | | | | | instruction get scheduled properly. llvm-svn: 84843
* Don't generate sbfx / ubfx with negative lsb field. Patch by David Conrad.Evan Cheng2009-10-221-0/+10
| | | | llvm-svn: 84813
* Match more patterns to movt.Evan Cheng2009-10-211-0/+19
| | | | llvm-svn: 84751
* Fix invalid for vector types fneg(bitconvert(x)) => bitconvert(x ^ sign)Anton Korobeynikov2009-10-201-0/+48
| | | | | | transform. llvm-svn: 84683
* convert to filecheck syntax and make a lot more aggressive.Chris Lattner2009-10-191-8/+68
| | | | llvm-svn: 84517
* rename testChris Lattner2009-10-191-0/+0
| | | | llvm-svn: 84515
* Enable post-alloc scheduling for all ARM variants except for Thumb1.Evan Cheng2009-10-161-5/+5
| | | | llvm-svn: 84249
* Revise ARM inline assembly memory operands to require the memory address toBob Wilson2009-10-131-1/+3
| | | | | | | be in a register. The previous use of ARM address mode 2 was completely arbitrary and inappropriate for Thumb. Radar 7137468. llvm-svn: 84022
* Add ARMv6T2 SBFX/UBFX instructions. Approved by Anton Korobeynikov.Sandeep Patel2009-10-131-0/+37
| | | | llvm-svn: 84009
* Eliminate some redundant llvm-as calls.Benjamin Kramer2009-10-121-1/+1
| | | | llvm-svn: 83837
* Update this test; the code is the same but it gets counted as oneDan Gohman2009-10-091-1/+1
| | | | | | fewer remat. llvm-svn: 83690
* Merge a bunch of NEON tests into larger files so they run faster.Bob Wilson2009-10-0987-3650/+3526
| | | | llvm-svn: 83667
* Convert some ARM tests with lots of greps to use FileCheck.Bob Wilson2009-10-095-58/+135
| | | | llvm-svn: 83651
* Commit one last NEON test to use FileCheck. That's all of them now!Bob Wilson2009-10-091-4/+13
| | | | llvm-svn: 83617
* Convert more NEON tests to use FileCheck.Bob Wilson2009-10-0911-115/+388
| | | | llvm-svn: 83616
* Add codegen support for NEON vst4lane intrinsics with 128-bit vectors.Bob Wilson2009-10-091-0/+28
| | | | llvm-svn: 83600
* Add codegen support for NEON vst3lane intrinsics with 128-bit vectors.Bob Wilson2009-10-081-0/+28
| | | | llvm-svn: 83598
* Add codegen support for NEON vst2lane intrinsics with 128-bit vectors.Bob Wilson2009-10-081-0/+28
| | | | llvm-svn: 83596
* Convert more NEON tests to use FileCheck.Bob Wilson2009-10-089-46/+139
| | | | llvm-svn: 83595
* Add codegen support for NEON vld4lane intrinsics with 128-bit vectors.Bob Wilson2009-10-081-0/+53
| | | | | | Also fix some copy-and-paste errors in previous changes. llvm-svn: 83590
* Convert more NEON tests to use FileCheck.Bob Wilson2009-10-0813-100/+295
| | | | llvm-svn: 83587
* Add codegen support for NEON vld3lane intrinsics with 128-bit vectors.Bob Wilson2009-10-081-0/+47
| | | | llvm-svn: 83585
* Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via ↵Anton Korobeynikov2009-10-081-2/+2
| | | | | | movt/movw pair. llvm-svn: 83572
* Add codegen support for NEON vld2lane intrinsics with 128-bit vectors.Bob Wilson2009-10-081-0/+41
| | | | llvm-svn: 83568
* Convert more NEON tests to use FileCheck.Bob Wilson2009-10-088-46/+140
| | | | llvm-svn: 83528
* Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors.Bob Wilson2009-10-081-0/+9
| | | | llvm-svn: 83526
* Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors.Bob Wilson2009-10-081-0/+9
| | | | llvm-svn: 83518
* Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors.Bob Wilson2009-10-081-0/+9
| | | | llvm-svn: 83513
* Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors.Bob Wilson2009-10-071-0/+12
| | | | llvm-svn: 83508
* Convert more NEON tests to use FileCheck.Bob Wilson2009-10-076-35/+114
| | | | llvm-svn: 83507
* Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors.Bob Wilson2009-10-071-0/+12
| | | | llvm-svn: 83506
* Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors.Bob Wilson2009-10-071-0/+12
| | | | llvm-svn: 83502
* Convert more NEON tests to use FileCheck.Bob Wilson2009-10-076-40/+118
| | | | llvm-svn: 83497
* Convert test to FileCheck.Bob Wilson2009-10-071-9/+27
| | | | llvm-svn: 83487
* Add codegen support for NEON vst4 intrinsics with 128-bit vectors.Bob Wilson2009-10-071-0/+41
| | | | llvm-svn: 83486
* Add codegen support for NEON vst3 intrinsics with 128-bit vectors.Bob Wilson2009-10-071-0/+41
| | | | llvm-svn: 83484
* Add codegen support for NEON vst2 intrinsics with 128-bit vectors.Bob Wilson2009-10-071-0/+37
| | | | llvm-svn: 83482
* Add codegen support for NEON vld4 intrinsics with 128-bit vectors.Bob Wilson2009-10-071-0/+54
| | | | llvm-svn: 83479
* Add codegen support for NEON vld3 intrinsics with 128-bit vectors.Bob Wilson2009-10-071-0/+54
| | | | llvm-svn: 83471
* Add tests for vld2 of 128-bit vectors.Bob Wilson2009-10-071-0/+50
| | | | llvm-svn: 83468
* Update NEON struct names to match llvm-gcc changes.Bob Wilson2009-10-068-195/+165
| | | | | | (This is not required for correctness but might help with sanity.) llvm-svn: 83415
* Fix tests.Evan Cheng2009-10-021-1/+1
| | | | llvm-svn: 83241
* Move load / store multiple before post-alloc scheduling.Evan Cheng2009-10-023-7/+5
| | | | llvm-svn: 83236
* Remove neonfp attribute and instead set default based on CPU string. Add ↵David Goodwin2009-10-0112-24/+24
| | | | | | -arm-use-neon-fp to override the default. llvm-svn: 83218
* Restore the -post-RA-scheduler flag as an override for the target ↵David Goodwin2009-10-015-5/+5
| | | | | | specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string. llvm-svn: 83215
* Remove -post-RA-schedule flag and add a TargetSubtarget method to enable ↵David Goodwin2009-09-305-5/+5
| | | | | | post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8. llvm-svn: 83122
* Post-RA regressions.David Goodwin2009-09-295-4/+113
| | | | llvm-svn: 83075
* Fix PR4687. Pre ARMv5te does not support ldrd / strd. Patch by John Tytgat.Evan Cheng2009-09-291-0/+19
| | | | llvm-svn: 83058
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