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bcm5719-llvm
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ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
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path:
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llvm
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test
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CodeGen
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ARM
/
swifterror.ll
Commit message (
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Author
Age
Files
Lines
*
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
Kristof Beyls
2017-06-28
1
-26
/
+26
*
ISel: Fix FastISel of swifterror values
Arnold Schwaighofer
2017-06-15
1
-0
/
+28
*
swiftcc: Don't emit tail calls from callers with swifterror parameters
Arnold Schwaighofer
2017-02-13
1
-0
/
+15
*
SwiftCC: swifterror register cannot be as the base register
Arnold Schwaighofer
2017-02-09
1
-77
/
+77
*
Recommit: ARM: sort register lists by encoding in push/pop instructions.
Tim Northover
2016-11-14
1
-4
/
+4
*
Revert "ARM: sort register lists by encoding in push/pop instructions."
Tim Northover
2016-11-14
1
-4
/
+4
*
ARM: sort register lists by encoding in push/pop instructions.
Tim Northover
2016-11-14
1
-4
/
+4
*
Make swift calling convention test specific to armv7
Arnold Schwaighofer
2016-10-28
1
-67
/
+65
*
More swift calling convention tests
Arnold Schwaighofer
2016-10-28
1
-0
/
+121
*
swifterror: Don't compute swifterror vregs during instruction selection
Arnold Schwaighofer
2016-10-07
1
-13
/
+16
*
Disable tail calls if there is an swifterror argument
Arnold Schwaighofer
2016-09-21
1
-0
/
+12
*
Swift Calling Convention: swifterror target support.
Manman Ren
2016-04-11
1
-0
/
+381