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bcm5719-llvm
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ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
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path:
root
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llvm
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test
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CodeGen
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ARM
/
single-issue-r52.mir
Commit message (
Expand
)
Author
Age
Files
Lines
*
[CodeGen] Use MIR syntax for MachineMemOperand printing
Francis Visoiu Mistrih
2018-03-14
1
-1
/
+1
*
Followup on Proposal to move MIR physical register namespace to '$' sigil.
Puyan Lotfi
2018-01-31
1
-12
/
+12
*
[CodeGen] Print RegClasses on MI in verbose mode
Francis Visoiu Mistrih
2018-01-18
1
-3
/
+3
*
[CodeGen] Don't print "pred:" and "opt:" in -debug output
Francis Visoiu Mistrih
2018-01-09
1
-3
/
+3
*
[CodeGen] Don't print register classes in -debug output
Francis Visoiu Mistrih
2018-01-09
1
-3
/
+3
*
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
Francis Visoiu Mistrih
2017-12-07
1
-7
/
+7
*
[CodeGen] Always use `printReg` to print registers in both MIR and debug
Francis Visoiu Mistrih
2017-11-30
1
-4
/
+4
*
[CodeGen] Print "%vreg0" as "%0" in both MIR and debug output
Francis Visoiu Mistrih
2017-11-30
1
-7
/
+7
*
CodeGen: Rename DEBUG_TYPE to match passnames
Matthias Braun
2017-05-25
1
-2
/
+2
*
Improve machine schedulers for in-order processors
Javed Absar
2017-03-27
1
-0
/
+86