| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [DAGCombine] Initialize the default operation action for SIGN_EXTEND_INREG ↵ | QingShan Zhang | 2020-01-03 | 1 | -7/+7 |
| | | | | | | | | | | | | for vector type as 'expand' instead of 'legal' For now, we didn't set the default operation action for SIGN_EXTEND_INREG for vector type, which is 0 by default, that is legal. However, most target didn't have native instructions to support this opcode. It should be set as expand by default, as what we did for ANY_EXTEND_VECTOR_INREG. Differential Revision: https://reviews.llvm.org/D70000 | ||||
| * | [NFC] Add one test to verify the sign_extend of vector type. | QingShan Zhang | 2019-11-11 | 1 | -0/+17 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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