| Commit message (Collapse) | Author | Age | Files | Lines |
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erased the instruction during LICM so UpdateRegPressureAfter() should not
reference it afterwards.
llvm-svn: 116845
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is", which breaks some nightly tests.
llvm-svn: 116816
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"long latency" enough to hoist even if it may increase spilling. Reloading
a value from spill slot is often cheaper than performing an expensive
computation in the loop. For X86, that means machine LICM will hoist
SQRT, DIV, etc. ARM will be somewhat aggressive with VFP and NEON
instructions.
- Enable register pressure aware machine LICM by default.
llvm-svn: 116781
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output to standard output also.
llvm-svn: 111435
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matches what llvm-gcc and clang now produce.
llvm-svn: 106221
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legalization even when the IR-level optimizer has removed dead phis, such
as when the high half of an i64 value is unused on a 32-bit target.
I had to adjust a few test cases that had dead phis.
This is a partial fix for Radar 7627077.
llvm-svn: 95816
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only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.
llvm-svn: 95493
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llvm-svn: 94123
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This new version is much more aggressive about doing "full" reduction in
cases where it reduces register pressure, and also more aggressive about
rewriting induction variables to count down (or up) to zero when doing so
reduces register pressure.
It currently uses fairly simplistic algorithms for finding reuse
opportunities, but it introduces a new framework allows it to combine
multiple strategies at once to form hybrid solutions, instead of doing
all full-reduction or all base+index.
llvm-svn: 94061
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immediate forms of cmov instructions at all.
llvm-svn: 89423
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llvm-svn: 85947
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llvm-svn: 85827
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hoisted to
the loop preheader. Add instructions which are already in the preheader block that
may be common expressions of those that are hoisted out. These does get a few more
instructions CSE'ed.
llvm-svn: 85799
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fewer remat.
llvm-svn: 83690
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variable increment / decrement slighter high priority.
This has major impact on some micro-benchmarks. On MultiSource/Applications
and spec tests, it's a minor win. It also reduce 256.bzip instruction count
by 8%, 55 on 164.gzip on i386 / Darwin.
llvm-svn: 82485
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llvm-svn: 81293
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llvm-svn: 63855
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llvm-svn: 54354
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This flag should ONLY be used to for tests like these.
llvm-svn: 54334
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llcbeta.
llvm-svn: 44660
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llvm-svn: 44435
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