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* Add missing load/store flags to thumb2 instructions.Pete Cooper2015-10-221-1/+1
* ARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor out common codeMatthias Braun2015-07-211-4/+52
* ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2Matthias Braun2015-07-211-0/+21
* Revert "ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2"Matthias Braun2015-07-201-21/+0
* Revert "ARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor out common code"Matthias Braun2015-07-201-52/+4
* Revert "Add missing load/store flags to thumb2 instructions."Pete Cooper2015-07-161-1/+1
* Add missing load/store flags to thumb2 instructions.Pete Cooper2015-07-151-1/+1
* ARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor out common codeMatthias Braun2015-07-101-4/+52
* ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2Matthias Braun2015-07-101-0/+21
* ARMLoadStoreOptimizer: Fix errata 602117 handling and make testcase actually ...Matthias Braun2015-06-241-14/+15
* ARM: Thumb2 LDRD/STRD supports independent input/output regsMatthias Braun2015-06-031-0/+16
* Revert "ARM: Thumb2 LDRD/STRD supports independent input/output regs"Renato Golin2015-06-021-16/+0
* ARM: Thumb2 LDRD/STRD supports independent input/output regsMatthias Braun2015-06-011-0/+16
* [opaque pointer type] Add textual IR support for explicit type parameter to g...David Blaikie2015-03-131-3/+3
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-6/+6
* [opaque pointer type] Add textual IR support for explicit type parameter to g...David Blaikie2015-02-271-3/+3
* Add extra CHECK prefix to tests with explicit prefixNico Rieck2014-02-161-4/+4
* Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to f...Stephen Lin2013-07-141-2/+2
* ARM: Remove a (false) dependency on the memoryoperand's value as we do not useQuentin Colombet2013-06-201-0/+28
* Don't run RAFast in the optimizing regalloc pipeline.Jakob Stoklund Olesen2012-06-081-2/+2
* Implement a bastardized ABI.Evan Cheng2012-04-271-1/+0
* Allocate virtual registers in ascending order.Jakob Stoklund Olesen2012-04-021-2/+1
* ARM Ld/St Optimizer fix.Andrew Trick2012-01-111-0/+46
* Add workaround for Cortex-M3 errata 602117 by replacing ldrd x, y, [x] with l...Evan Cheng2011-11-081-11/+12
* Weekly fix of register allocation dependent unit tests.Jakob Stoklund Olesen2011-04-301-2/+2
* LDRD/STRD instructions should print both Rt and Rt2 in the asm string.Jim Grosbach2011-04-011-1/+1
* Fix ARM tests to be register allocator independent.Jakob Stoklund Olesen2011-03-311-5/+7
* Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrmJohnny Chen2010-03-171-2/+2
* --- Reverse-merging r98637 into '.':Bob Wilson2010-03-161-2/+2
* Initial ARM/Thumb disassembler check-in. It consists of a tablgen backendJohnny Chen2010-03-161-2/+2
* Enable post-alloc scheduling for all ARM variants except for Thumb1.Evan Cheng2009-10-161-5/+5
* Convert test to filecheck.Evan Cheng2009-09-261-3/+11
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-091-3/+3
* Enable arm pre-allocation load / store multiple optimization pass.Evan Cheng2009-06-191-3/+3
* Part 1.Evan Cheng2009-06-151-0/+14
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