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* [ARM] Update ifcvt test target triples and opcodes. NFCDavid Green2020-01-021-6/+6
| | | | | | Some of the instructions in these tests were technically invalid combinations (using ARM opcodes in Thumb mode, for example). Update the targets and the instructions used to be more correct.
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-5/+5
| | | | | | | | | | | | Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
* Move tests to the correct placeMatthias Braun2018-01-191-0/+25
test/CodeGen/MIR is for testing the MIR parser/printer. Tests for passes and targets belong to test/CodeGen/TARGETNAME. llvm-svn: 322925
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