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* [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).Kristof Beyls2017-06-281-2/+0
| | | | | | | | | | | | | | | | The benchmarking summarized in http://lists.llvm.org/pipermail/llvm-dev/2017-May/113525.html showed this is beneficial for a wide range of cores. As is to be expected, quite a few small adaptations are needed to the regressions tests, as the difference in scheduling results in: - Quite a few small instruction schedule differences. - A few changes in register allocation decisions caused by different instruction schedules. - A few changes in IfConversion decisions, due to a difference in instruction schedule and/or the estimated cost of a branch mispredict. llvm-svn: 306514
* [opaque pointer type] Add textual IR support for explicit type parameter to ↵David Blaikie2015-02-271-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
* Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side-Jim Grosbach2011-03-111-1/+1
| | | | | | effect that we get proper instruction printing using the "pop" mnemonic for it. llvm-svn: 127502
* PR8921: LDM/POP do not support interworking prior to v5t.Bob Wilson2011-01-061-6/+4
| | | | llvm-svn: 122970
* Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.Bob Wilson2010-03-161-1/+1
| | | | | | | This does not move entirely to UAL syntax, since the default "increment after" suffix is empty but we still use "IA" for that. llvm-svn: 98635
* Use Unified Assembly Syntax for the ARM backend.Jim Grosbach2009-11-091-1/+1
| | | | llvm-svn: 86494
* Convert more tests to avoid llvm-as.Dan Gohman2009-09-111-8/+3
| | | | llvm-svn: 81545
* -enable-arm-if-conversion is gone.Evan Cheng2007-09-201-4/+4
| | | | llvm-svn: 42169
* Convert tests using "| wc -l | grep ..." to use the count script.Dan Gohman2007-08-151-3/+3
| | | | llvm-svn: 41097
* Add explicit triples to these tests so that llc behaves as expected onDan Gohman2007-07-091-4/+11
| | | | | | non-Apple hosts. llvm-svn: 38455
* Added some if-conversion tests.Evan Cheng2007-06-201-0/+32
llvm-svn: 37672
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