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* Address buildbot fallout from r259065David Majnemer2016-01-281-3/+4
| | | | llvm-svn: 259074
* Only emit movw on ARMv6T2+Renato Golin2014-09-021-1/+1
| | | | | | | | Fix PR18364. Patch by Dimitry Andric. llvm-svn: 216989
* ARM: fixup more tests to specify the target more explicitlySaleem Abdulrasool2014-04-031-1/+1
| | | | | | | | | | | | | This changes the tests that were targeting ARM EABI to explicitly specify the environment rather than relying on the default. This breaks with the new Windows on ARM support when running the tests on Windows where the default environment is no longer EABI. Take the opportunity to avoid a pointless redirect (helps when trying to debug with providing a command line invocation which can be copy and pasted) and removing a few greps in favour of FileCheck. llvm-svn: 205541
* Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to ↵Stephen Lin2013-07-141-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
* Fix a miscompilation caused by a typo. When turning a adde with negative valueEvan Cheng2012-10-241-0/+13
| | | | | | | | | into a sbc with a positive number, the immediate should be complemented, not negated. Also added a missing pattern for ARM codegen. rdar://12559385 llvm-svn: 166613
* Fix fall outs from my recent change on how carry bit is modeled during isel.Evan Cheng2011-09-061-0/+10
| | | | | | | | Now the 'S' instructions, e.g. ADDS, treat S bit as optional operand as well. Also fix isel hook to correctly set the optional operand. rdar://10073745 llvm-svn: 139157
* Don't depend on the optimization reverted in r134067.Benjamin Kramer2011-06-291-1/+0
| | | | llvm-svn: 134068
* Thumb2 and ARM add/subtract with carry fixes.Andrew Trick2011-04-231-0/+17
| | | | | | | | | | | | | Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>. t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the assembly printer correctly prints the 's' suffix. Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags. Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS. Fixes ARM SBC lowering to check for live carry (potential bug). llvm-svn: 130048
* Fix some more failures by converting to FileCheck.Bob Wilson2009-10-271-3/+8
| | | | llvm-svn: 85207
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-091-3/+3
| | | | llvm-svn: 81293
* Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry ↵Evan Cheng2009-06-251-2/+2
| | | | | | bit def is not used. llvm-svn: 74228
* ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and ↵Evan Cheng2009-06-251-0/+16
SBCS / RSCS. llvm-svn: 74200
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