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* [ARM] Check for assembler instructions in test.Florian Hahn2017-08-231-9/+10
| | | | | | Currently this test causes test failures on some machines, due to isel not being registered. Update the test to run all passes and check emitted assembly instructions for now. llvm-svn: 311545
* [ARM] Add missing patterns for insert_subvector.Florian Hahn2017-08-231-0/+33
Summary: In some cases, shufflevector instruction can be transformed involving insert_subvector instructions. The ARM backend was missing some insert_subvector patterns, causing a failure during instruction selection. AArch64 has similar patterns. Reviewers: t.p.northover, olista01, javed.absar, rengolin Reviewed By: javed.absar Subscribers: aemerson, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D36796 llvm-svn: 311543
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