bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
*	[ARM][ParallelDSP] Relax alias checks	Sam Parker	2019-05-13	1	-50/+0
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	When deciding the safety of generating smlad, we checked for any writes within the block that may alias with any of the loads that need to be widened. This is overly conservative because it only matters when there's a potential aliasing write to a location accessed by a pair of loads. Now we check for aliasing writes only once, during setup. If two loads are found to have an aliasing write between them, we don't add these loads to LoadPairs. This means that later during the transform, we can safely widened a pair without worrying about aliasing. However, to maintain correctness, we also need to change the way that wide loads are inserted because the order is now important. The MatchSMLAD method has also been changed, absorbing MatchReductions and AddMACCandidate to hopefully improve readability. Differential Revision: https://reviews.llvm.org/D6102 llvm-svn: 360567
*	[ARM][NFC] Move smlad tests	Sam Parker	2019-03-12	1	-0/+50
\| \| \| \| \| \|	Created a test/CodeGen/ARM/ParallelDSP folder. llvm-svn: 355907
*	Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")	Eli Friedman	2018-10-18	1	-50/+0
\| \| \| \| \| \| \|	Still causing failures on the polly-aosp buildbot; I'll follow up with a reduced testcase. llvm-svn: 344752
*	[ARM] bottom-top mul support in ARMParallelDSP	Sam Parker	2018-10-17	1	-0/+50
	Previously reverted in rL343082. Original commit message: On failing to find sequences that can be converted into dual macs, try to find sequential 16-bit loads that are used by muls which we can then use smultb, smulbt, smultt with a wide load. Differential Revision: https://reviews.llvm.org/D51983 llvm-svn: 344693