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path: root/llvm/test/CodeGen/ARM/GlobalISel/pr35375.ll
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* Rename ExpandISelPseudo->FinalizeISel, delay register reservationMatt Arsenault2019-06-191-2/+2
| | | | | | | | | | | This allows targets to make more decisions about reserved registers after isel. For example, now it should be certain there are calls or stack objects in the frame or not, which could have been introduced by legalization. Patch by Matthias Braun llvm-svn: 363757
* [globalisel][tablegen] Fix PR35375 by sign-extending the table value to ↵Daniel Sanders2017-11-281-0/+12
match getConstantVRegVal() Summary: From the bug report: > The problem is that it fails when trying to compare -65536 (or 4294901760) to 0xFFFF,0000. This is because the > constant in the instruction is sign extended to 64 bits (0xFFFF,FFFF,FFFF,0000) and then compared to the non > extended 64 bit version expected by TableGen. > > In contrast, the DAGISelEmitter generates special code for AND immediates (OPC_CheckAndImm), which does not > sign extend. This patch doesn't introduce the special case for AND (and OR) immediates since the majority of it is related to handling known bits that have no effect on the result and GlobalISel doesn't detect known-bits at this time. Instead this patch just ensures that the immediate is extended consistently on both sides of the check. Thanks to Diana Picus for the detailed bug report. Reviewers: rovka Reviewed By: rovka Subscribers: kristof.beyls, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D40532 llvm-svn: 319252
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