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path: root/llvm/test/CodeGen/AMDGPU/spill-empty-live-interval.mir
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* AMDGPU: Cleanup / relax tests for future changesMatt Arsenault2018-11-261-24/+15
* [AMDGPU] Switch to the new addr space mapping by defaultYaxun Liu2018-02-021-2/+2
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-12/+12
* [CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih2017-11-301-1/+1
* MIR: Print the register class or bank in vreg defsJustin Bogner2017-10-241-6/+6
* [AMDGPU] Eliminate no effect instructions before s_endpgmStanislav Mekhanoshin2017-08-161-1/+0
* RA: Remove another assert on empty intervalsMatt Arsenault2017-07-221-0/+34
* RA: Remove assert on empty live intervalsMatt Arsenault2017-07-211-0/+40
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