| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | AMDGPU: Cleanup / relax tests for future changes | Matt Arsenault | 2018-11-26 | 1 | -24/+15 |
| * | [AMDGPU] Switch to the new addr space mapping by default | Yaxun Liu | 2018-02-02 | 1 | -2/+2 |
| * | Followup on Proposal to move MIR physical register namespace to '$' sigil. | Puyan Lotfi | 2018-01-31 | 1 | -12/+12 |
| * | [CodeGen] Print "%vreg0" as "%0" in both MIR and debug output | Francis Visoiu Mistrih | 2017-11-30 | 1 | -1/+1 |
| * | MIR: Print the register class or bank in vreg defs | Justin Bogner | 2017-10-24 | 1 | -6/+6 |
| * | [AMDGPU] Eliminate no effect instructions before s_endpgm | Stanislav Mekhanoshin | 2017-08-16 | 1 | -1/+0 |
| * | RA: Remove another assert on empty intervals | Matt Arsenault | 2017-07-22 | 1 | -0/+34 |
| * | RA: Remove assert on empty live intervals | Matt Arsenault | 2017-07-21 | 1 | -0/+40 |

