| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | AMDGPU: Figure out private memory regs after lowering | Matt Arsenault | 2017-07-18 | 1 | -26/+46 |
| * | AMDGPU: Allow SIShrinkInstructions to fold FrameIndexes | Matt Arsenault | 2017-07-10 | 1 | -4/+2 |
| * | AMDGPU: Allow SIShrinkInstructions to work in non-SSA | Matt Arsenault | 2017-07-10 | 1 | -2/+2 |
| * | [AMDGPU] Untangle SDWA pass from SIShrinkInstructions | Stanislav Mekhanoshin | 2017-06-03 | 1 | -2/+4 |
| * | [AMDGPU] Allow SDWA in instructions with immediates and SGPRs | Stanislav Mekhanoshin | 2017-05-30 | 1 | -4/+2 |
| * | AMDGPU: GFX9 GS and HS shaders always have the scratch wave offset in SGPR5 | Marek Olsak | 2017-05-04 | 1 | -0/+103 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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