| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [AMDGPU] Switch scalarize global loads ON by default | Alexander Timofeev | 2017-07-04 | 1 | -1/+1 |
| | | | | | | | Differential revision: https://reviews.llvm.org/D34407 llvm-svn: 307097 | ||||
| * | Revert r307026, "[AMDGPU] Switch scalarize global loads ON by default" | NAKAMURA Takumi | 2017-07-04 | 1 | -1/+1 |
| | | | | | | | | | | It broke a testcase. Failing Tests (1): LLVM :: CodeGen/AMDGPU/alignbit-pat.ll llvm-svn: 307054 | ||||
| * | [AMDGPU] Switch scalarize global loads ON by default | Alexander Timofeev | 2017-07-03 | 1 | -1/+1 |
| | | | | | | | Differential revision: https://reviews.llvm.org/D34407 llvm-svn: 307026 | ||||
| * | AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel | Matt Arsenault | 2017-03-21 | 1 | -2/+2 |
| | | | | | | | | | | | | | Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444 | ||||
| * | AMDGPU: Run LoadStoreVectorizer pass by default | Matt Arsenault | 2016-09-09 | 1 | -1/+0 |
| | | | | | llvm-svn: 281112 | ||||
| * | AMDGPU: Make vectorization defeating test changes | Matt Arsenault | 2016-05-25 | 1 | -2/+2 |
| | | | | | | | Simplifies test updates in the future. llvm-svn: 270736 | ||||
| * | AMDGPU/SI: Assembler: Unify parsing/printing of operands. | Nikolay Haustov | 2016-04-29 | 1 | -2/+2 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The goal is for each operand type to have its own parse function and at the same time share common code for tracking state as different instruction types share operand types (e.g. glc/glc_flat, etc). Introduce parseAMDGPUOperand which can parse any optional operand. DPP and Clamp/OMod have custom handling for now. Sam also suggested to have class hierarchy for operand types instead of table. This can be done in separate change. Remove parseVOP3OptionalOps, parseDS*OptionalOps, parseFlatOptionalOps, parseMubufOptionalOps, parseDPPOptionalOps. Reduce number of definitions of AsmOperand's and MatchClasses' by using common base class. Rename AsmMatcher/InstPrinter methods accordingly. Print immediate type when printing parsed immediate operand. Use 'off' if offset/index register is unused instead of skipping it to make it more readable (also agreed with SP3). Update tests. Reviewers: tstellarAMD, SamWot, artem.tamazov Subscribers: qcolombet, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19584 llvm-svn: 268015 | ||||
| * | AMDGPU: Remove some old intrinsic uses from tests | Matt Arsenault | 2016-02-11 | 1 | -3/+1 |
| | | | | | llvm-svn: 260493 | ||||
| * | R600 -> AMDGPU rename | Tom Stellard | 2015-06-13 | 1 | -0/+41 |
| llvm-svn: 239657 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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