summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/AMDGPU/mfma-loop.ll
Commit message (Collapse)AuthorAgeFilesLines
* [AMDGPU] Fixed mfma-loop test. NFC.Stanislav Mekhanoshin2019-11-131-26/+111
|
* [AMDGPU] Fold AGPR reg_sequence initializersStanislav Mekhanoshin2019-10-251-38/+330
| | | | Differential Revision: https://reviews.llvm.org/D69413
* [AMDGPU] Fix mfma scheduling crashStanislav Mekhanoshin2019-10-241-0/+34
| | | | | | | An SUnit can be neither intruction not SDNode. It is all null if represents a nop. Fixed a crash on using SU->getInstr(). Differential Revision: https://reviews.llvm.org/D69395
* [AMDGPU] Select AGPR in PHI operand legalizationStanislav Mekhanoshin2019-10-211-1/+52
| | | | | | | | | | | | | | If a PHI defines AGPR legalize its operands to AGPR. At the moment we can get an AGPR PHI with VGPR operands. I am not aware of any problems as it seems to be handled gracefully in RA, but this is not right anyway. It also slightly decreases VGPR pressure in some cases because we do not have to a copy via VGPR. Differential Revision: https://reviews.llvm.org/D69206 llvm-svn: 375446
* [AMDGPU] move PHI nodes to AGPR classStanislav Mekhanoshin2019-10-181-0/+29
If all uses of a PHI are in AGPR register class we should avoid unneeded copies via VGPRs. Differential Revision: https://reviews.llvm.org/D69200 llvm-svn: 375297
OpenPOWER on IntegriCloud