| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | DAG: Handle odd vector sizes in calling conv splitting | Matt Arsenault | 2018-09-10 | 1 | -18/+17 |
| * | AMDGPU: Split wide vectors of i16/f16 into 32-bit regs on calls | Matt Arsenault | 2018-07-31 | 1 | -12/+13 |
| * | AMDGPU: Make v4i16/v4f16 legal | Matt Arsenault | 2018-06-15 | 1 | -22/+27 |
| * | [DAG] fold FP binops with undef operands to NaN | Sanjay Patel | 2018-05-21 | 1 | -2/+5 |
| * | [AMDGPU][MC][GFX9][disassembler] Corrected decoding of op_sel_hi for v_mad_mix* | Dmitry Preobrazhensky | 2017-11-17 | 1 | -34/+34 |
| * | AMDGPU: Start selecting v_mad_mixhi_f16 | Matt Arsenault | 2017-09-20 | 1 | -23/+169 |
| * | AMDGPU: Start selecting v_mad_mixlo_f16 | Matt Arsenault | 2017-09-20 | 1 | -0/+161 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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