| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class (PR33045) | Simon Pilgrim | 2017-05-23 | 1 | -1/+1 |
| * | AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel | Matt Arsenault | 2017-03-21 | 1 | -40/+40 |
| * | AMDGPU: Add VI i16 support | Tom Stellard | 2016-11-10 | 1 | -3/+9 |
| * | Revert "AMDGPU: Add VI i16 support" | Tom Stellard | 2016-11-04 | 1 | -9/+3 |
| * | AMDGPU: Add VI i16 support | Tom Stellard | 2016-11-03 | 1 | -3/+9 |
| * | AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the scheduler | Tom Stellard | 2016-08-29 | 1 | -17/+37 |
| * | AMDGPU/R600: Enable Load combine | Jan Vesely | 2016-08-27 | 1 | -19/+369 |
| * | AMDGPU/SI: Canonicalize offset order for merged DS instructions | Tom Stellard | 2016-08-26 | 1 | -5/+5 |
| * | AMDGPU: Improve load/store of illegal types. | Matt Arsenault | 2016-07-01 | 1 | -190/+36 |
| * | AMDGPU: Cleanup load tests | Matt Arsenault | 2016-06-02 | 1 | -0/+608 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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