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* AMDGPU: Remove legacy image intrinsicsMatt Arsenault2017-04-041-44/+0
| | | | llvm-svn: 299443
* AMDGPU: Add a shader calling conventionNicolai Haehnle2016-04-061-8/+7
| | | | | | | | | | | This makes it possible to distinguish between mesa shaders and other kernels even in the presence of compute shaders. Patch By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Differential Revision: http://reviews.llvm.org/D18559 llvm-svn: 265589
* [AMDGPU] Assembler: Basic support for MIMGNikolay Haustov2016-02-261-3/+3
| | | | | | | | | | | Add parsing and printing of image operands. Matches legacy sp3 assembler. Change image instruction order to have data/image/sampler operands in the beginning. This is needed because optional operands in MC are always last. Update SITargetLowering for new order. Add basic MC test. Update CodeGen tests. Review: http://reviews.llvm.org/D17574 llvm-svn: 261995
* AMDGPU: Make v32i8/v64i8 illegal typesMatt Arsenault2016-01-261-6/+6
| | | | | | | | Old intrinsics were forcing these, but they have now all been removed. This fixes large i8 vector operations generally being broken. llvm-svn: 258788
* R600 -> AMDGPU renameTom Stellard2015-06-131-0/+45
llvm-svn: 239657
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