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path: root/llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
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* [AMDGPU] Fix DAGTypeLegalizer::SplitInteger for shift amount typeYaxun Liu2017-11-211-3/+3
* AMDGPU: Fix breaking SMEM clausesMatt Arsenault2017-11-171-3/+6
* AMDGPU: Replace i64 add/sub loweringMatt Arsenault2017-11-151-10/+12
* AMDGPU: Fix -enable-var-scope violationsMatt Arsenault2017-11-121-6/+7
* [AMDGPU] Prevent post-RA scheduler from breaking memory clausesStanislav Mekhanoshin2017-09-191-2/+2
* AMDGPU: Start selecting global instructionsMatt Arsenault2017-07-291-27/+31
* [AMDGPU] Untangle SDWA pass from SIShrinkInstructionsStanislav Mekhanoshin2017-06-031-4/+4
* [AMDGPU] Preserve operand order in SIFoldOperandsStanislav Mekhanoshin2017-06-031-6/+4
* [AMDGPU] Allow SDWA in instructions with immediates and SGPRsStanislav Mekhanoshin2017-05-301-10/+22
* AMDGPU: Fix S_PACK_HH_B32_B16Konstantin Zhuravlyov2017-04-211-1/+1
* AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernelMatt Arsenault2017-03-211-23/+23
* [AMDGPU] Add address space based alias analysis passStanislav Mekhanoshin2017-03-171-3/+3
* [AMDGPU] Remove getBidirectionalReasonRankStanislav Mekhanoshin2017-03-111-10/+10
* LiveRegMatrix: Fix some subreg interference checksMatthias Braun2017-03-021-6/+6
* AMDGPU: Support v2i16/v2f16 packed operationsMatt Arsenault2017-02-271-16/+136
* AMDGPU: Custom lower more vector operationsMatt Arsenault2017-01-231-0/+350
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