| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [AMDGPU] Inline asm - added i16, half and i128 types support | Daniil Fukalov | 2018-06-08 | 1 | -11/+11 |
| | | | | | | | | | | | AMDGPU inline assembler support i16, half and i128 typed variables in constraints, but they were reported as error. Needed to fix https://github.com/RadeonOpenCompute/ROCm/issues/341, e.g. to be able to load with global_load_dwordx4 to a 128bit integer variable Differential Revision: https://reviews.llvm.org/D44920 llvm-svn: 334301 | ||||
| * | AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel | Matt Arsenault | 2017-03-21 | 1 | -4/+4 |
| | | | | | | | | | | | | | Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444 | ||||
| * | AMDGPU: Allow 16-bit types in inline asm constraints | Matt Arsenault | 2016-12-20 | 1 | -0/+41 |
| llvm-svn: 290193 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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