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* [AMDGPU] Fix typo in SIInstrInfo::memOpsHaveSameBasePtrJay Foad2019-12-171-459/+470
| | | | | | | | | | | | | | | Summary: The typo has been present since memOpsHaveSameBasePtr was introduced in r313208. It caused SIInstrInfo::shouldClusterMemOps to cluster more mem ops than it was supposed to. Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D71616
* AMDGPU: Fix i16 arithmetic pattern redundancyMatt Arsenault2019-10-081-5/+4
| | | | | | | | | | | | | | There were 2 problems here. First, these patterns were duplicated to handle the inverted shift operands instead of using the commuted PatFrags. Second, the point of the zext folding patterns don't apply to the non-0ing high subtargets. They should be skipped instead of inserting the extension. The zeroing high code would be emitted when necessary anyway. This was also emitting unnecessary zexts in cases where the high bits were undefined. llvm-svn: 374092
* [AMDGPU] Regenerate idot tests. NFCI.Simon Pilgrim2019-07-111-2/+2
| | | | | | Reduces diff in D63281. llvm-svn: 365754
* [AMDGPU] gfx10 tests. NFC.Stanislav Mekhanoshin2019-06-201-0/+430
| | | | llvm-svn: 363946
* [DAGCombine] Prune unnused nodes.Nirav Dave2019-03-291-20/+20
| | | | | | | | | | | | | | | | | | | Summary: Nodes that have no uses are eventually pruned when they are selected from the worklist. Record nodes newly added to the worklist or DAG and perform pruning after every combine attempt. Reviewers: efriedma, RKSimon, craig.topper, spatel, jyknight Reviewed By: jyknight Subscribers: jdoerfert, jyknight, nemanjai, jvesely, nhaehnle, javed.absar, hiraditya, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58070 llvm-svn: 357283
* AMDGPU: Actually commit re-run of update_llc_test_checksMatt Arsenault2018-08-311-0/+1854
| | | | llvm-svn: 341218
* AMDGPU: Fix broken generated check linesMatt Arsenault2018-08-311-1311/+3
| | | | | | This was incorrectly using the same check prefix for multiple lines llvm-svn: 341214
* [AMDGPU] Support idot2 pattern.Farhana Aleen2018-08-211-0/+1850
Summary: Transform add (mul ((i32)S0.x, (i32)S1.x), add( mul ((i32)S0.y, (i32)S1.y), (i32)S3) => i/udot2((v2i16)S0, (v2i16)S1, (i32)S3) Author: FarhanaAleen Reviewed By: arsenm Subscribers: llvm-commits, AMDGPU Differential Revision: https://reviews.llvm.org/D50024 llvm-svn: 340295
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