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* AMDGPU: Replace shrunk instruction with dummy implicit_defMatt Arsenault2019-05-031-0/+56
| | | | | | | | | | | | This was broken if the original operand was killed. The kill flag would appear on both instructions, and fail the verifier. Keep the kill flag, but remove the operands from the old instruction. This has an added benefit of really reducing the use count for future folds. Ideally the pass would be structured more like what PeepholeOptimizer does to avoid this hack to avoid breaking instruction iterators. llvm-svn: 359891
* AMDGPU: Fix incorrect commute with sub when folding immediatesMatt Arsenault2019-05-031-8/+8
| | | | | | | | | When a fold of an immediate into a sub/subrev required shrinking the instruction, the wrong VOP2 opcode was used. This was using the VOP2 equivalent of the original instruction, not the commuted instruction with the inverted opcode. llvm-svn: 359883
* [AMDGPU] Asm/disasm clamp modifier on vop3 int arithmeticTim Renouf2019-03-181-25/+25
| | | | | | | | | | | | | | Allow the clamp modifier on vop3 int arithmetic instructions in assembly and disassembly. This involved adding a clamp operand to the affected instructions in MIR and MC, and thus having to fix up several places in codegen and MIR tests. Differential Revision: https://reviews.llvm.org/D59267 Change-Id: Ic7775105f02a985b668fa658a0cd7837846a534e llvm-svn: 356399
* [AMDGPU] Add support for immediate operand for S_ENDPGMDavid Stuttard2019-03-121-36/+36
| | | | | | | | | | | | | | | | | Summary: Add support for immediate operand in S_ENDPGM Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6 Reviewers: alexshap Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59213 llvm-svn: 355902
* Don't count debug instructions towards neighborhood countMatt Arsenault2018-08-301-0/+183
| | | | | | | | | In computeRegisterLiveness, the max instructions to search was counting dbg_value instructions, which could potentially cause an observable codegen change from the presence of debug info. llvm-svn: 341028
* CodeGen: Make computeRegisterLiveness search forward firstMatt Arsenault2018-08-301-2/+2
| | | | | | | | If there is an unused def, this would previously report that the register was live. Check for uses first so that it is reported as dead if never used. llvm-svn: 341027
* CodeGen: Make computeRegisterLiveness consider successorsMatt Arsenault2018-08-301-4/+66
| | | | | | | | If the end of the block is reached during the scan, check the live ins of the successors. This was already done in the other direction if the block entry was reached. llvm-svn: 341026
* AMDGPU: Shrink insts to fold immediatesMatt Arsenault2018-08-281-0/+347
This needs to be done in the SSA fold operands pass to be effective, so there is a bit of overlap with SIShrinkInstructions but I don't think this is practically avoidable. llvm-svn: 340859
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